OM6208 NXP Semiconductors, OM6208 Datasheet - Page 48
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OM6208
Manufacturer Part Number
OM6208
Description
Om6208 65 X 96 Pixels Matrix Grey-scale Lcd Driver
Manufacturer
NXP Semiconductors
Datasheet
1.OM6208.pdf
(68 pages)
- Current page: 48 of 68
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Philips Semiconductors
17.2.2
Factory defaults available from user-configurable registers
are as follows:
17.3
The module maker programming is performed in a special
mode: the calibration mode (CALMM). This mode is
entered via a special interface command, CALMM. To
prevent wrongful programming, a seal bit has been
implemented which prevents the device from entering the
2003 feb 10
handbook, full pagewidth
Temperature slope selection values are set by SLA[2:0],
SLB[2:0], SLC[2:0] and SLD[2:0]
Default charge pump multiplication factor value is set by
S[1:0]
Default V
Default bias level values are set by BS[2:0]
Grey-scale mode default frame frequency and tuning
values are set by GFR[2:0] and GT[2:0]
Black-and-white mode default frame frequency and
tuning values are set by SFR[2:0] and ST[2:0].
65 x 96 pixels matrix grey-scale LCD driver
Seal bit
D
EFAULTS FROM INTERFACE REGISTERS
PR
read data
OTP cell
from the
value is set by V
REGISTER
FLIP-FLOP
OTP CELL
OTP slice
SHIFT
write data
to the
OTP cell
PR
[7:0]
REGISTER
INPUT
SHIFT
DATA
Fig.43 Basic OTP architecture.
CONFIGURATION AND CALIBRATION
48
calibration mode. This seal bit, once programmed, cannot
be reversed, thus further changes in programmed values
are not possible. Applying the programming voltages when
not in CALMM mode has no effect on the programmed
values.
Table 22 Seal bit definition
17.4
The OTP circuitry in the OM6208 contains many bits of
data. The circuitry for one bit is called an OTP slice. Each
OTP slice consists of two main parts: the OTP cell (a
non-volatile memory cell) and the shift register cell (a
flip-flop). The OTP cells are accessible only through their
shift register cells: both reading from and writing to the
OTP cells are performed with the shift register cells, but
only the shift register cells are visible to the rest of the
circuit. The basic OTP architecture is shown in Fig.43.
DATA TO THE CIRCUIT FOR
SEAL BIT
OTP architecture
0
1
possible to enter calibration mode
calibration mode disabled
ACTION
Product specification
SHIFT
REGISTER
OTP CELLS
MGW841
OM6208
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