MBM29SL160TD Fujitsu Microelectronics, Inc., MBM29SL160TD Datasheet

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MBM29SL160TD

Manufacturer Part Number
MBM29SL160TD
Description
Flash Memory 16m 2m X 8/1m X 16 Bit
Manufacturer
Fujitsu Microelectronics, Inc.
Datasheet
FUJITSU SEMICONDUCTOR
FLASH MEMORY
CMOS
16M (2M
MBM29SL160TD
Embedded Erase
FEATURES
• Single 1.8 V read, program, and erase
• Compatible with JEDEC-standard commands
• Compatible with JEDEC-standard world-wide pinouts
• Minimum 100,000 program/erase cycles
• High performance
• Sector erase architecture
• Boot Code Sector Architecture
• One Time Protect (OTP) region
• WP/ACC input pin
• Embedded Erase
• Embedded Program
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY)
DATA SHEET
Minimizes system level power requirements
Uses same software commands as E
48-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)
48-ball FBGA (Package suffix: PBT)
100 ns maximum access time
Eight 4K word and thirty one 32K word sectors in word mode
Eight 8K byte and thirty one 64K byte sectors in byte mode
Any combination of sectors can be concurrently erased. Also supports full chip erase.
T = Top sector
B = Bottom sector
256 Byte of OTP , accessible through a new “OTP Enable” command sequence
Factory serialized and protected to provide a secure electronic serial number (ESN)
At V
At V
At V
Automatically pre-programs and erases the chip or any sector
Automatically writes and verifies data at specified address
Hardware method for detection of program or erase cycle completion
IL
IH
HH
, allows protection of boot sectors, regardless of sector protection/unprotection status
, allows removal of boot sector protection
, increases program performance
TM
and Embedded Program
TM
Algorithms
TM
Algorithms
8/1M
TM
are trademarks of Advanced Micro Devices, Inc.
-10/-12
2
PROMs
/MBM29SL160BD
16) BIT
DS05-20877-1E
-10/-12
(Continued)

Related parts for MBM29SL160TD

MBM29SL160TD Summary of contents

Page 1

... FUJITSU SEMICONDUCTOR DATA SHEET FLASH MEMORY CMOS 16M (2M MBM29SL160TD FEATURES • Single 1.8 V read, program, and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Uses same software commands as E • Compatible with JEDEC-standard world-wide pinouts 48-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type) 48-ball FBGA (Package suffix: PBT) • ...

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... MBM29SL160TD -10/-12 (Continued) • Automatic sleep mode When addresses remain stable, automatically switch themselves to low power mode. • Erase Suspend/Resume Suspends the erase operation to allow a read in another sector within the same device • Sector group protection Hardware method disables any combination of sector groups from program or erase operations • ...

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... MBM29SL160TD GENERAL DESCRIPTION The MBM29SL160TD/BD are a 16M-bit, 1.8 V-only Flash memory organized as 2M bytes of 8 bits each or 1M words of 16 bits each. The MBM29SL160TD/BD are offered in a 48-pin TSOP(I) and 48-ball FBGA Package. These devices are designed to be programmed in-system with the standard system 1 and 5 ...

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... SA36 SA37 SA38 Note: The address range The address range /MBM29SL160BD Sector Address Tables (MBM29SL160TD) Sector ( 8) Size (Kbytes/ Address Range Kwords 64/32 000000H to 00FFFFH 64/32 010000H to 01FFFFH ...

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... MBM29SL160TD Table 1 .2 Sector Address Sector SA38 SA37 SA36 SA35 SA34 SA33 SA32 SA31 SA30 SA29 ...

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... SGA8 SGA9 1 1 SGA10 1 1 SGA11 1 1 SGA12 1 1 SGA13 1 1 SGA14 1 1 SGA15 1 1 SGA16 /MBM29SL160BD Sector Group Addresses (MBM29SL160TD) (Top Boot Block ...

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... MBM29SL160TD Table 2 .2 Sector Group SGA0 0 0 SGA1 0 0 SGA2 0 0 SGA3 0 0 SGA4 0 0 SGA5 0 0 SGA6 0 0 SGA7 SGA8 SGA9 0 0 SGA10 0 1 SGA11 0 1 SGA12 1 0 SGA13 1 0 SGA14 SGA15 ...

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... State BYTE Control RESET Command WP/ACC Register CE OE Low V Detector /MBM29SL160BD MBM29SL160TD/MBM29SL160BD V = 2.0 V±0.2V -10 CC 100 100 35 RY/BY Erase Voltage Generator Program Voltage Chip Enable Generator Output Enable Logic STB Timer for Address Program/Erase Latch -10/-12 -12 120 ...

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... MBM29SL160TD/MBM29SL160BD 37 Standard Pinout FPT-48P-M19 25 (Marking Side MBM29SL160TD/MBM29SL160BD 36 Reverse Pinout FPT-48P-M20 -10/- BYTE ...

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... MBM29SL160TD (Continued /MBM29SL160BD -10/-12 FBGA (TOP VIEW) Marking side ...

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... MBM29SL160TD LOGIC SYMBOL A – RESET RY/BY BYTE WP/ACC /MBM29SL160BD -10/-12 Table 3 MBM29SL160TD/BD Pin Configuration Pin Function Address Inputs - Data Inputs/Outputs Chip Enable OE Output Enable WE Write Enable RY/BY Ready/Busy Output Hardware Reset Pin/Temporary Sector ...

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... Write (Program/Erase) Enable Sector Group Protection (2), (4) Verify Sector Group Protection (2), (4) Temporary Sector Group Unprotection (5) Reset (Hardware)/Standby Boot Block Sector Write Protection Table 5 MBM29SL160TD/BD User Bus Operations (BYTE = V Operation Auto-Select Manufacturer Code (1) Auto-Select Device Code (1) Read (3) Standby Output Disable ...

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... FUNCTIONAL DESCRIPTION Read Mode The MBM29SL160TD/BD have two control functions which must be satisfied in order to obtain data at the outputs the power control and should be used for a device selection the output control and should be used to gate data to the output pins if a device is selected. ...

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... MBM29SL160TD The manufacturer and device codes may also be read via the command register, for instances when the MBM29SL160TD/BD are erased or programmed in a system without access to high voltage on the A command sequence is illustrated in Table 7. (Refer to Autoselect Command section.) Word represents the manufacturer’s code (Fujitsu = 04H) and word 1 (A ...

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... Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters. Sector Group Protection The MBM29SL160TD/BD feature hardware sector group protection. This feature will disable both program and erase operations in any combination of seventeen sector groups of memory. (See Tables 2.1 and 2.2). The sector group protection feature is enabled using programming equipment at the user’ ...

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... MBM29SL160TD RESET Hardware Reset The MBM29SL160TD/BD devices may be reset by driving the RESET pin to V requirement and has to be kept low (V Any operation in the process of being executed will be terminated and the internal state machine will be reset to the read mode “t ” after the RESET pin is driven low. Furthermore, once the RESET pin goes high, the READY devices require an additional “ ...

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... MBM29SL160TD Table 7 MBM29SL160TD/BD Command Definitions First Bus Bus Command Write Write Cycle Sequence Cycles Req’d Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data Word 1 XXXH F0H Read/Reset Byte Word 555H 3 AAH Read/Reset AAAH Byte 555H Word ...

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... MBM29SL160TD Notes: 1. Address bits Address (SA). 2. Bus operations are defined in Tables 4 and Address of the memory location to be read PA = Address of the memory location to be programmed Addresses are latched on the falling edge of the write pulse Address of the sector to be erased. The combination of A uniquely select any sector ...

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... The operation is initiated by writing the Autoselect command sequence into the command register. Following the command write, a read cycle from address (XX)00H retrieves the manufacture code of 04H. A read cycle from address (XX)01H for 16((XX)02H for 8) returns the device code (MBM29SL160TD = E4H and MBM29SL160BD = E7H for 8 mode; MBM29SL160TD = 22E4H and MBM29SL160BD = 22E7H for 16 mode), (See Tables 6 ...

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... MBM29SL160TD The system can determine the status of the program operation by using DQ or RY/BY. The Data Polling and Toggle Bit must be performed at the memory location which is being programmed. The automatic programming operation is completed when the data on DQ bit at which time the devices return to the read mode and addresses are no longer latched. (See Table 13, Hardware Sequence Flags ...

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... MBM29SL160TD complete. (Refer to the Write Operation Status section for Sector Erase Timer operation.) Loading the sector erase buffer may be done in any sequence and with any number of sectors (0 to 38). Sector erase does not require the user to program the devices prior to erase. The devices automatically program all memory locations in the sector( erased prior to electrical erase (Preprogram function) ...

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... Extended Command (1) Fast Mode MBM29SL160TD/BD has Fast Mode function. This mode dispenses with the initial two unclock cycles required in the standard program command sequence by writing Fast Mode command into the command register. In this mode, the required bus cycle for programming is two cycles instead of four bus cycles in standard program command ...

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... This ensures the security of the ESN once the product is shipped to the field. The OTP region is 256 bytes in length. The MBM29SL160TD occupies the address of the byte mode 1FFEFFH to 1FFFFFH (word mode FFF7FH to FFFFFH) and the MBM29SL160BD type occupies the address of the byte mode 00000H to 00100H (word mode 00000H to 00080H) ...

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... DQ 6 Toggle Bit I The MBM29SL160TD/BD also feature the “Toggle Bit I” method to indicate to the host system that the Embedded Algorithms are in progress or completed. During an Embedded Program or Erase Algorithm cycle, successive attempts to read (OE toggling) data from the devices will result in DQ toggling between one and zero ...

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... MBM29SL160TD DQ 5 Exceeded Timing Limits DQ will indicate if the program or erase time has exceeded the specified limits (internal pulse count). Under 5 these conditions DQ will produce a “1”. This is a failure condition which indicates that the program or erase 5 cycle was not successfully completed. Data Polling is the only operating function of the devices under this condition ...

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... RY/BY Ready/Busy The MBM29SL160TD/BD provide a RY/BY open-drain output pin as a way to indicate to the host system that the Embedded Algorithms are either in progress or has been completed. If the output is low, the devices are busy with either a program or erase operation. If the output is high, the devices are ready to accept any read/ write or erase operation ...

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... MBM29SL160TD Write Pulse “Glitch” Protection Noise pulses of less than 5 ns (typical) on OE, CE will not initiate a write cycle. Logical Inhibit Writing is inhibited by holding any one must be a logical zero while logical one. Power-Up Write Inhibit Power-up of the devices with The internal state machine is automatically reset to the read mode on power-up ...

Page 28

... ACC (Acceleration) Supply 28h 0002h Maximum 29h 0000h 00h = Not Supported, D7-4: volt, D3-0: 100 mvolt 2Ah 0000h 2Bh 0000h Boot Type 02h = MBM29SL160BD 2Ch 0002h 03h = MBM29SL160TD 2Dh 0007h 2Eh 0000h 2Fh 0020h 30h 0000h -10/- ...

Page 29

... MBM29SL160TD ABSOLUTE MAXIMUM RATINGS Parameter Storage Temperature Ambient Temperature with Power Applied Voltage with respect to Ground All pins except A , OE, RESET 9 (Note 1) Power Supply Voltage (Note OE, and RESET (Note 2) 9 WP/ACC Notes: 1. Minimum DC voltage on input or I/O pins are –0.5 V. During voltage transitions, inputs may negative overshoot V to – ...

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... MBM29SL160TD MAXIMUM OVERSHOOT 0 –0.5 V –2.0 V Figure Figure 2 +12.0 V +11 +0 This waveform is applied for A Figure 3 30 /MBM29SL160BD -10/- Maximum Negative Overshoot Waveform Maximum Positive Overshoot Waveform OE, and RESET. 9 Maximum Positive Overshoot Waveform 2 ...

Page 31

... MBM29SL160TD DC CHARACTERISTICS Parameter Parameter Description Symbol I Input Leakage Current LI I Output Leakage Current OE, RESET Inputs Leakage 9 I LIT Current I WP/ACC Inputs Leakage Current LIA I V Active Current (Note 1) CC1 Active Current (Note 2) CC2 Current (Standby) CC3 Current (Standby, Reset) ...

Page 32

... CE or BYTE Switching Low or ELFL — t High ELFH Notes: Test Conditions: Output Load:1 TTL gate and 30 pF (MBM29SL160TD/BD-10) 1 TTL gate and 100 pF (MBM29SL160TD/BD-12) Input rise and fall times Input pulse levels: 0 Timing measurement reference level Input: 0 Output: 0 ...

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... MBM29SL160TD • Write/Erase/Program Operations Parameter Symbols JEDEC Standard t t Write Cycle Time AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH Data Hold Time WHDX DH — t Output Enable Setup Time OES Output — ...

Page 34

... MBM29SL160TD (Continued) Parameter Symbols JEDEC Standard — t BYTE Switching Low to Output High-Z FLQZ — t BYTE Switching High to Output Active FHQV — t Program/Erase Valid to RY/BY Delay BUSY — t Delay Time from Embedded Output Enable EOE — t Power On/Off Timing PS Notes: 1. This does not include the preprogramming time. ...

Page 35

... MBM29SL160TD SWITCHING WAVEFORMS • Key to Switching Waveforms WAVEFORM Addresses OEH WE High-Z Outputs Figure 5.1 /MBM29SL160BD -10/-12 INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from from May Will Be Change Changing from from “H” or “L” ...

Page 36

... MBM29SL160TD Addresses RESET Outputs Figure 5.2 36 /MBM29SL160BD -10/- Addresses Stable t ACC t RH High-Z AC Waveforms for Hardware Reset/Read Operations -10/- Output Valid ...

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... MBM29SL160TD 3rd Bus Cycle Addresses 555H WPH t GHWL A0H Data Notes address of the memory location to be programmed data to be programmed at byte address the output of the complement of the data written to the device. ...

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... MBM29SL160TD Addresses Data Notes address of the memory location to be programmed data to be programmed at byte address the output of the complement of the data written to the device the output of the data written to the device. OUT 5. Figure indicates last two bus cycles out of four bus cycle sequence. ...

Page 39

... MBM29SL160TD Addresses 555H GHWL AAH Data t VCS V CC Notes the sector address for Sector Erase. Addresses = 555H (Word), AAAH (Byte) for Chip Erase. 2. These waveforms are for the 16 mode. (The addresses differ from 8 mode.) Figure 8 ...

Page 40

... MBM29SL160TD Data Data Valid Data (The device has completed the Embedded operation). 7 Figure 9 AC Waveforms for Data Polling during Embedded Algorithm Operations CE t OEH WE t OES OE DQ Data stops toggling (The device has completed the Embedded operation). ...

Page 41

... MBM29SL160TD CE WE RY/BY Figure 11 RY/BY Timing Diagram during Program/Erase Operations WE RESET RY/BY Figure 12 RESET/RY/BY Timing Diagram /MBM29SL160BD -10/-12 The rising edge of the last WE signal Entire programming or erase operations t BUSY READY -10/-12 41 ...

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... MBM29SL160TD CE BYTE ELFH Figure 13 CE BYTE t ELFL Figure BYTE Figure 15 42 /MBM29SL160BD -10/-12 Data Output Data Output (DQ ( FHQV A -1 Timing Diagram for Word Mode Configuration Data Output Data Output ...

Page 43

... MBM29SL160TD SAX VLHT VLHT WE t CSP CE Data t VCS V CC SGAX:Sector Group Address for initial sector SGAY:Sector Group Address for next sector Note byte mode. ...

Page 44

... MBM29SL160TD VIDR t VCS RESET CE WE RY/BY Figure 17 Enter Erase Embedded Suspend Erasing WE Erase Toggle DQ and with OE Note read from the erase-suspended sector /MBM29SL160BD -10/-12 t Program or Erase Command Sequence VLHT Temporary Sector Group Unprotection Timing Diagram ...

Page 45

... MBM29SL160TD VCS RESET t VLHT t VIDR Add Data 60H SGAX : Sector Group Address to be protected SGAY : Next Sector Group Address to be protected TIME-OUT : Time-Out window = 50 s (min) Figure 19 Extended Sector Group Protection Timing Diagram /MBM29SL160BD -10/-12 SGAX ...

Page 46

... MBM29SL160TD RESET 1 Addresses Data 46 /MBM29SL160BD -10/- Input Valid Output Valid ACC Figure 20 Power ON/OFF Timing Diagram -10/- ...

Page 47

... MBM29SL160TD VACCR t VCS V ACC V IH WP/ACC VLHT RY/BY Figure 21 Accelerated Program Operation Timing Diagram /MBM29SL160BD -10/-12 Program Command Sequence Accelerated Program -10/-12 t VLHT 3V t VLHT 47 ...

Page 48

... MBM29SL160TD EMBEDDED ALGORITHMS Increment Address * : The sequence is applied for The addresses differ from Figure 22 48 /MBM29SL160BD -10/-12 Start Write Program Command Sequence (See below) Data Polling Device No Last Address ? Yes Programming Completed Program Command Sequence* (Address/Command): 555H/AAH 2AAH/55H 555H/A0H Program Address/Program Data 16 mode ...

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... MBM29SL160TD EMBEDDED ALGORITHMS Chip Erase Command Sequence* (Address/Command): 555H/AAH 2AAH/55H 555H/80H 555H/AAH 2AAH/55H 555H/10H * : The sequence is applied for The addresses differ from 8 mode. Figure 23 /MBM29SL160BD -10/-12 Start Write Erase Command Sequence (See below) Data Polling or Toggle Bit Successfully Completed Erasure Completed Individual Sector/Multiple Sector* ...

Page 50

... MBM29SL160TD Note rechecked even /MBM29SL160BD -10/-12 Start Read ( Byte address for programming 0 7 Addr Yes DQ = Data Yes Read ( Addr Yes DQ = Data Fail Pass = “1” because DQ may change simultaneously with ...

Page 51

... MBM29SL160TD No Note rechecked even changing to “1” Figure 25 /MBM29SL160BD -10/-12 Start Read ( Addr. = "H" or "L" Toggle 6 ? Yes Yes Read ( Addr Toggle 6 ? Yes Fail Pass = “1” because DQ may stop toggling at the same time as ...

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... MBM29SL160TD Increment PLSCNT PLSCNT = 25? Remove V Write Reset Command Device Failed * : byte mode /MBM29SL160BD -10/-12 Start Setup Sector Addr PLSCNT = RESET = Activate WE Pulse Time out 100 ...

Page 53

... MBM29SL160TD Unprotection Completed Notes: 1. All protected sectors are unprotected. 2. All previously protected sectors are protected once again. Figure 27 Temporary Sector Unprotection Algorithm /MBM29SL160BD -10/-12 Start RESET = V ID (Note 1) Perform Erase or Program Operations RESET = V IH Temporary Sector (Note 2) -10/-12 53 ...

Page 54

... MBM29SL160TD FAST MODE ALGORITHM Increment Address * : The sequence is applied for The addresses differ from Figure 28 54 /MBM29SL160BD -10/-12 Start 555H/AAH 2AAH/55H 555H/20H XXXH/A0H Program Address/Program Data Data Polling Device No Verify Byte? Yes No Last Address ? Yes Programming Completed XXXH/90H XXXH/F0H 16 mode. 8 mode. Embedded Program ...

Page 55

... MBM29SL160TD FAST MODE ALGORITHM Device is Operating in Temporary Sector Unprotection Mode Increment PLSCNT No PLSCNT = 25? Yes Remove V from RESET ID Write Reset Command Device Failed Figure 29 /MBM29SL160BD -10/-12 Start RESET = V ID Wait Extended Sector Protection Entry? Yes To Setup Sector Protection Write XXXH/60H PLSCNT = 1 ...

Page 56

... MBM29SL160TD ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Word Programming Time Byte Programming Time Chip Programming Time Program/Erase Cycle Note: TSOP(I) PIN CAPACITANCE Parameter Parameter Description Symbol C Input Capacitance IN C Output Capacitance OUT C Control Pin Capacitance IN2 Note: Test conditions T = 25° ...

Page 57

... MBM29SL160TD ORDERING INFORMATION Standard Products Fujitsu standard products are available in several packages. The order number is formed by a combination of: MBM29SL160 T D DEVICE NUMBER/DESCRIPTION MBM29SL160 16Mega-bit (2M 1.8 V-only Read, Program, and Erase /MBM29SL160BD -10/-12 -10 PFTN PACKAGE TYPE PFTN = 48-Pin Thin Small Outline Package (TSOP) Standard Pinout ...

Page 58

... MBM29SL160TD PACKAGE DIMENSIONS 48-pin plastic TSOP(I) (FPT-48P-M19) LEAD No. 1 INDEX 24 20.00±0.20 (.787±.008) * 18.40±0.20 (.724±.008) 0.10(.004) 19.00±0.20 (.748±.008) 1996 FUJITSU LIMITED F48029S-2C /MBM29SL160BD -10/-12 48 "A" 25 0.50(.0197) 0.15±0.05 (.006±.002) 0.50±0.10 (.020±.004) -10/-12 * Resin Protrusin. (Each Side: 0.15 (.006)Max) Details of " ...

Page 59

... MBM29SL160TD (Continued) 48-pin plastic TSOP(I) (FPT-48P-M20) LEAD No. 1 INDEX 24 19.00±0.20 (.748±.008) 0.10(.004) * 18.40±0.20 (.724±.008) 20.00±0.20 (.787±.008) 1996 FUJITSU LIMITED F48030S-2C-2 C /MBM29SL160BD -10/-12 * Resin Protrusin. (Each Side: 0.15 (.006)Max) 48 Details of "A" part 0.15(.006) MAX "A" 0.15(.006) ...

Page 60

... MBM29SL160TD (Continued) 48-pin plastic FBGA (BGA-48P-M13) 9.00±0.20(.354±.008) INDEX C0.25(.010) 0.10(.004) 1998 FUJITSU LIMITED B480013S-1C /MBM29SL160BD -10/-12 Note: The actual shape of corners may differ from the dimension. +0.15 1.05 .041 –0.10 (Mounting height) 0.38±0.10(.015±.004) (Stand off) 8.00±0.20 4.00(.157) (.315± ...

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... MBM29SL160TD -10/-12 FUJITSU LIMITED For further information please contact: Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-8588, Japan Tel: 81(44) 754-3763 Fax: 81(44) 754-3329 http://www.fujitsu.co.jp/ North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division ...

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