HFC-U Cologne Chip AG, HFC-U Datasheet - Page 22

• Manufacturer Part Number: HFC-U
• Description: Isdn HDLC Basic Rate Controller
• Manufacturer: Cologne Chip AG

HFC-U
Figure 4: FIFO Data Organisation
The ending flag of a HDLC-frame can also be the starting flag of the next frame.
After a frame is received completely F1 is incremented by the HFC-U automatically and the next
frame can be received.
After reading a frame via the processor bus interface F2 must be incremented. If the frame counter F2
is incremented also the Z-counters may change because Z1 and Z2 are functions of F1 and F2. So
there are Z1(F1), Z2(F1), Z1(F2) and Z2(F2) (see Figure 3).
Z1(F1) is used for the frame which is just received from the GCI/IOM side of the HFC. Z2(F2) is
used for the frame which is just beeing transmitted to the ISA-PC bus interface. Z1(F2) is the end of
frame pointer of the current output frame.
To calculate the length of the current receive frame the software has to evaluate Z1-Z2. When Z2
reaches Z1 the complete frame has been read.
In the receive channels F2 must be incremented from the PC interface side after the software detects
an end of receive frame (Z1=Z2) and F1 F2. Then the current value of Z2 is stored, F2 is
incremented and Z2 is copied as start address of the next frame. If Z1 = Z2 and F1 = F2 the FIFO is
totally empty. Z1(F1) can not be accessed.
March 1997
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