HFC-U Cologne Chip AG, HFC-U Datasheet - Page 38

• Manufacturer Part Number: HFC-U
• Description: Isdn HDLC Basic Rate Controller
• Manufacturer: Cologne Chip AG

*)
6.2
Timing Diagram 2: SRAM access
March 1997
SYMBOL
t
t
SYMBOL
f
f
t
t
t
t
t
t
BUSRDH
NOACC
LOW
HIGH
CLK
SRA
SRAH
SRD
CLK
CLK
*)
only in processor mode
*)
*)
SRAM access
Delay Time from /IOR High to BUSDIR High
Time no access is possible
Clock frequency (1/2 clock mode)
Clock frequency (normal clock mode)
Clock Low Level Width
Clock High Level Width
Clock Cycle Time
Address Stable after Clock
Address Stable Hold Time after Clock
Data Out Stable after Clock
CHARACTERISTICS
CHARACTERISTICS
1/ f
MIN.
30ns
30ns
15ns
5ns
5ns
0
0
4 x t
CLK
MIN.
2ns
CLK
30MHz
15MHz
MAX.
70ns
50ns
MAX.
HFC-U
15ns
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