HFC-U Cologne Chip AG, HFC-U Datasheet - Page 32

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HFC-U

Manufacturer Part Number
HFC-U
Description
Isdn HDLC Basic Rate Controller
Manufacturer
Cologne Chip AG
Datasheet
March 1997
Name
INT_M2
For mask bits a '1' enables and a '0' disables interrupt. RESET clears all bits to '0'.
(1Bh)
Bits
0
1
2
3
4
5
6
7
r/w
w
w
w
w
w
w
w
w
Function
interrupt mask for BUSY/NOBUSY transition
interrupt mask for GCI I-change interrupt
in 64 kbit/s mode: must be '0'
in 56 kbit/s mode: value of the LSB in 7-bit mode
enable for interrupt output
'0'
'1'
56 kbit/s mode selection bit for B1-channel
'0'
'1'
56 kbit/s mode selection bit for B2-channel
'0'
'1'
'0'
'1'
'0'
'1'
disable (reset default)
enable
64 kbit/s mode (reset default)
56 kbit/s mode
64 kbit/s mode (reset default)
56 kbit/s mode
Data not inverted for B1-channel (reset default)
Data inverted for B1-channel
Data not inverted for B2-channel (reset default)
Data inverted for B2-channel
HFC-U
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