nRF24LE1 Nordic VLSI, nRF24LE1 Datasheet - Page 133
nRF24LE1
Manufacturer Part Number
nRF24LE1
Description
Manufacturer
Nordic VLSI
Datasheet
1.NRF24LE1.pdf
(191 pages)
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nRF24LE1 Preliminary Product Specification
17.3.3
Pin assignments in package 48 pin 7x7 mm
Due to the pin count in this package no IO conflicts exists between digital peripheral blocks. Pins P1.1 -
P1.7 have two system inputs listed per pin. This means that the input from the pin is driving both system
inputs if the pin is configured as an input.
Pins P1.0 - P1.1 are listed with two system outputs, such as p1Do 1 and TXD. In these two cases the Port-
Crossbar combines the two drivers using an AND gate and lets the AND gate drive the pin if it is configured
as an output. The AND gate is chosen since both the TXD and RXD signals are high when idle. The
SMISO pin driver is enabled only when SCSN is active.
Revision 1.1
133 of 191