nRF24LE1 Nordic VLSI, nRF24LE1 Datasheet - Page 44

• Manufacturer Part Number: nRF24LE1
• Manufacturer: Nordic VLSI

nRF24LE1 Preliminary Product Specification
The RF Transceiver SPI Master is configured through SPIRCON1. Four different sources can generate
interrupt, unless they are masked by their respective bits in SPIRCON1. SPIRSTAT reveals which sources
that are active.
SPIRDAT accesses both the TX (write) and the RX (read) FIFOs, which are two bytes deep. The FIFOs
are dynamic and can be refilled according to the state of the status flags: “FIFO ready” means that the
FIFO can accept data. “Data ready” means that the FIFO can provide data, minimum one byte.
RFCON controls the RF Transceiver SPI Slave chip select signal (CSN), the RF Transceiver chip enable
signal (CE) and the RF Transceiver clock enable signal (CKEN).
3.5.2
This section describes the SPI commands and timing.
3.5.2.1
The SPI commands are shown in
the RFCON register.
The SPI command is transferred to RF Transceiver by writing the command to the SPIRDAT register. After
the first transfer the RF Transceiver's STATUS register can be read from SPIRDAT when the transfer is
completed.
The serial shifting SPI commands is in the following format:
<Command word: MSBit to LSBit (one byte)>
<Data bytes: LSByte to MSByte, MSBit in each byte first>
.
Revision 1.1
Addr
0xE8
SPI operation
Bit
7:3
2
1
0
SPI commands
Name
rfcken
rfcsn
rfce
-
R/W
RW
RW
RW
Table 10.
Reserved
RF Clock Enable (16MHz)
Enable RF command. 0: enabled
Enable RF Transceiver. 1: enabled
Table 9. RFCON register
Every new command must be started by writing 0 to rfcsn in
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Function