MT57W1MH18B Micron Semiconductor Products, Inc., MT57W1MH18B Datasheet - Page 4

• Manufacturer Part Number: MT57W1MH18B
• Description: 18Mb Ddrii SRAM, 1.8V Vdd, Hstl, 2-Word Burst,
• Manufacturer: Micron Semiconductor Products, Inc.

NOTE
18Mb: 1.8V V
MT57W1MH18B_H.fm – Rev. H, Pub. 3/03
1. SA0 is toggled at each K and K# rising edge.
2. The compare width is n – 1 bits. The compare is performed only if a WRITE is pending and a READ cycle is requested.
3. Figure 2 illustrates simplified device operation. See truth table, ball descriptions, and timing diagrams for detailed
4. For 2 Meg x 8, n = 21, a = 8; NWx# = 2 separate nibble writes.
NWx#
BWx#
R/W#
LD#
If the address matches, data is routed directly to the device outputs, bypassing the memory array.
information.
For 1 Meg x 18, n = 20, a = 18; BWx# = 2 separate byte writes.
For 512K x 36, n = 19, a = 36; BWx# = 4 separate byte writes.
K#
SA
K
:
DD
, HSTL, DDRIIb2 SRAM
n
a
a
E
E
E
REGISTER
ADDRESS
REGISTER
REGISTER
ADDRESS
E
E
REGISTER
REGISTER
WRITE
R/W#
INPUT
INPUT
COMPARE
n
(NOTE 2)
a
WRITE#
a
SA0'''
SA0’
SA0#’
SA0’
SA0#’
SA0’
0
1
n
CLK
CLK
a
a
a
SA0
Figure 2: Functional Block Diagram
2 Meg x 8; 1 Meg x 18; 512K x 36
D0
REGISTER
WRITE
C
BURST
LOGIC
(NOTE 1)
n-1
n
REGISTER
Q0
OE
a
a
SA0’
DRIVER
WRITE
n
n
a
a
WRITE#
WRITE#
READ
MEMORY
ARRAY
2
n
4
x a
SA’
SA0''
2 MEG
a
a
1.8V V
SENSE
AMPS
Micron Technology, Inc., reserves the right to change products or specifications without notice.
C#
C
C
a
a
X
CONTROL
OUTPUT
LOGIC
REGISTER
8, 1 MEG
OUTPUT
DD
, HSTL, DDRIIb2 SRAM
a
a
SA0'''
MUX
2:1
0
1
a
a
X
18, 512K
a
OUTPUT
BUFFER
ZQ
E
©2003 Micron Technology, Inc.
a
2
X
36
CQ, CQ#
DQ