EPCS64 Altera Corporation, EPCS64 Datasheet - Page 26
EPCS64
Manufacturer Part Number
EPCS64
Description
(EPCS1 - EPCS64) Serial Configuration Devices
Manufacturer
Altera Corporation
Datasheet
1.EPCS64.pdf
(32 pages)
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Timing Information
Figure 4–17. Read Operation Timing
4–26
Configuration Handbook, Volume 2
DCLK
DATA
ASDI
nCS
Add_Bit 0
t
nCLK2D
Bit N
Table 4–13
read operation.
f
t
t
t
t
RCLK
CH
CL
ODIS
nCLK2D
Table 4–13. Read Operation Parameters
Symbol
Bit N
Core Version a.b.c variable
defines the serial configuration device timing parameters for
1
Read clock frequency (from
FPGA or embedded processor)
for read bytes operation
DCLK
DCLK
Output disable time after read
Clock falling edge to data
high time
low time
Parameter
t
CL
t
CH
Min
25
25
Bit 0
Altera Corporation
Max
20
15
15
July 2004
t
ODIS
MHz
Unit
ns
ns
ns
ns