MT28F320A18 Micron Technology, MT28F320A18 Datasheet - Page 25

• Manufacturer Part Number: MT28F320A18
• Description: FLASH MEMORY
• Manufacturer: Micron Technology

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DataSheet
CHIP PROTECTION REGISTER
the security considerations in the system (preventing
the device substitution).
segments. The first 64 bits are programmed at the
manufacturing site with a unique 64-bit unchangeable
number. The other segment is left blank for customers
to program as desired. (See Figure 8).
Reading the Chip Protection Register
identification mode, loading the 90h command to the
bank containing address 00h. Once in this mode,
READ cycles from addresses shown in Table 10 retrieve
the specified information. To return to the read array
mode, write the READ ARRAY command (FFh).
Programming the Chip Protection
Register
enables the customer to program the user portion of
the protection register. First, write the PROTECTION
PROGRAM SETUP command, C0h; then write address
and data to program.
TION PROGRAM commands outside the defined pro-
tection register address space. Attempting to program
to a previously locked protection register segment will
2 Meg x 16, 1.8V Enhanced+ Boot Block Flash Memory
MT28F320A18_F.fm – Rev F 08/03 EN
4
U
A 128-bit protection register can be used to fulfill
The 128-bit security area is divided into two 64-bit
The chip protection register is read in the device
Executing the PROTECTION PROGRAM command
Attempts should not be made to address PROTEC-
Protection Register Memory Map
.com
88h
85h
84h
81h
80h
Factory-Programmed
PR Lock
User-Programmed
Figure 8:
4 Words
4 Words
1.8V ENHANCED+ BOOT BLOCK FLASH MEMORY
0
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25
result in a status register error (program error bit SR4
and lock error bit SR1 = 1)
Locking the Chip Protection Register
tection register can be locked by programming bit 1 of
the PR lock location to "0". Bit 0 of this location is pro-
grammed to a “0” at the Micron factory to protect the
unique device number. Bit 1 is set using the PROTEC-
TION PROGRAM command to program FFFDh to the
PR lock location. After these bits have been pro-
grammed, no further changes can be made to the val-
ues stored in the protection register. PROTECTION
PROGRAM commands to a locked section will result in
a status register error program error bit SR4 and lock
error bit SR1 will be set to 1. Protection register lockout
is not reversible.
V
tem programming and erase with V
1.95V (V
ming is offered for compatibility with existing pro-
gramming
algorithm is enabled at V
operations when V
operations and 10 cumulative hours when V
gramming voltage can be held LOW for absolute hard-
ware write protection of all blocks in the Flash device.
When V
operation will result in an error, prompting the corre-
sponding status register bit (SR3) to be set.
monitors the V
tions are allowed only when V
specified in T
WRITE/ERASE operation will be disabled.
Table 11: V
In-Factory (V
In-System (V
PP
The customer-programmable segment of the pro-
The MT28F320A18 Flash memory provides in-sys-
The device can withstand 100,000 WRITE/ERASE
In addition to the flexible block locking, the V
During WRITE and ERASE operations, the WSM
When V
/V
CC
PP1
PP
Program and Erase Voltages
) range. The 12V V
is below V
CC
PP
equipment.
ABLE
PP
1)
2)
is below V
PP
PP
11.
voltage level. WRITE/ERASE opera-
Range (V)
PP
PPLK
= V
PP
MIN
11.4
0.9
, any PROGRAM or ERASE
LKO
PP1
= V
The
PP
PP2
or 100 WRITE/ERASE
PP
(V
or below V
.
2 MEG x 16
fast
PP2
is within the range
) mode program-
PP
©2003 Micron Technology Inc.
programming
in the 0.9V–
MAX
1.95
12.6
PP
PPLK
= V
PP
, any
PP2
pro-
.