IDT71P73804 Integrated Device Technology, IDT71P73804 Datasheet - Page 9

• Manufacturer Part Number: IDT71P73804
• Description: 1.8v 1m X 18 Ddr Ii Pipelined Sram
• Manufacturer: Integrated Device Technology

NOTES:
1) All byte write (BWx) and nibble write (NWx) signals are sampled on
the rising edge of K and again on K. The data that is present on the data
bus in the designated byte/nibble will be latched into the input if the
corresponding BWx or NWx is held low. The rising edge of K will sample
the first and third bytes/nibbles of the four word burst and the rising edge
of K will sample the second and fourth bytes/nibbles of the four word
burst.
2) The availability of the BWx or NWx on designated devices is de-
scribed in the pin description table.
3) The DDRII Burst of four SRAM has data forwarding. A read request
that is initiated on the cycle following a write request to the same address
will produce the newly written data in response to the read request.
Linear Burst Sequence Table
NOTES:
1. SA [1:0] is the address presented on pins SA1 and SA0 giving the burst sequence a,b,c,d.
2. SA0 and SA1 are only available on the x18 and x36-bit devices.
Write Descriptions
Signal
Write Byte 0
Write Byte 1
Write Byte 2
Write Byte 3
Write Nibble 0
Write Nibble 1
18 Mb DDR II SRAM Burst of 4
IDT71P73204 (2M x 8-Bit), 71P73104 (2M x 9-Bit), 71P73804 (1M x 18-Bit) 71P73604 (512K x 36-Bit)
SA [1:0]
00
01
10
11
BW
X
X
X
X
X
L
0
BW
00
10
01
11
X
X
X
X
X
a
L
1
(1,2)
BW
X
X
X
X
X
L
2
BW
X
X
X
X
X
L
3
NW
00
10
01
11
b
X
X
X
X
X
L
0
(1,2)
6431 tbl 09
NW
X
X
X
X
X
L
1
6.42
9
00
10
01
11
c
00
10
01
11
d
Commercial Temperature Range
6431 tbl 22