LM3S1150-IQC50-A1 Luminary Micro, Inc., LM3S1150-IQC50-A1 Datasheet - Page 211

no-image

LM3S1150-IQC50-A1

Manufacturer Part Number
LM3S1150-IQC50-A1
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
June 14, 2007
Bit/Field
3:2
7
6
5
4
1
0
TAEVENT
TAPWML
TASTALL
reserved
RTCEN
TAOTE
Name
TAEN
Luminary Micro Confidential-Advance Product Information
Type
R/W
R/W
R/W
R/W
R/W
R/W
RO
Reset
0
0
0
0
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
GPTM TimerA PWM Output Level
0: Output is unaffected.
1: Output is inverted.
GPTM TimerA Output Trigger Enable
0: The output TimerA trigger is disabled.
1: The output TimerA trigger is enabled.
GPTM RTC Enable
0: RTC counting is disabled.
1: RTC counting is enabled.
GPTM TimerA Event Mode
00: Positive edge.
01: Negative edge.
10: Reserved.
11: Both edges.
GPTM TimerA Stall Enable
0: TimerA stalling is disabled.
1: TimerA stalling is enabled.
GPTM TimerA Enable
0: TimerA is disabled.
1: TimerA is enabled and begins counting or the capture logic is enabled
based on the GPTMCFG register.
LM3S1150 Microcontroller
211

Related parts for LM3S1150-IQC50-A1