LM3S1150-IQC50-A1 Luminary Micro, Inc., LM3S1150-IQC50-A1 Datasheet - Page 228
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LM3S1150-IQC50-A1
Manufacturer Part Number
LM3S1150-IQC50-A1
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S1150-IQC50-A1.pdf
(471 pages)
- Current page: 228 of 471
- Download datasheet (5Mb)
Watchdog Timer
11
11.1
11.2
228
Watchdog Timer
WDT
A watchdog timer can generate nonmaskable interrupts (NMIs) or a reset when a time-out value is
reached. The watchdog timer is used to regain control when a system has failed due to a software
error or due to the failure of an external device to respond in the expected way.
The Stellaris
register, interrupt generation logic, a locking register, and user-enabled stalling.
The Watchdog Timer can be configured to generate an interrupt to the controller on its first time-out,
and to generate a reset signal on its second time-out. Once the Watchdog Timer has been configured,
the lock register can be written to prevent the timer configuration from being inadvertently altered.
Block Diagram
Figure 11-1. WDT Module Block Diagram
Functional Description
The Watchdog Timer module consists of a 32-bit down counter, a programmable load register,
interrupt generation logic, and a locking register. Once the Watchdog Timer has been configured,
System Clock
Interrupt
®
Watchdog Timer module consists of a 32-bit down counter, a programmable load
Luminary Micro Confidential-Advance Product Information
Control / Clock /
Generation
WDTLOCK
WDTTEST
Interrupt
WDTCTL
WDTMIS
WDTICR
WDTRIS
WDTPCellID0
WDTPCellID1
WDTPCellID2
WDTPCellID3
Identification Registers
WDTPeriphID0
WDTPeriphID1
WDTPeriphID2
WDTPeriphID3
0x00000000
WDTPeriphID4
WDTPeriphID5
WDTPeriphID6
WDTPeriphID7
32-Bit Down
Comparator
WDTLOAD
Counter
WDTVALUE
June 14, 2007
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