LM3S1150-IQC50-A1 Luminary Micro, Inc., LM3S1150-IQC50-A1 Datasheet - Page 409
![no-image](/images/no-image-200.jpg)
LM3S1150-IQC50-A1
Manufacturer Part Number
LM3S1150-IQC50-A1
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S1150-IQC50-A1.pdf
(471 pages)
- Current page: 409 of 471
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17.4
Table 17-1. QEI Register Map
17.5
June 14, 2007
Offset
0x00C
0x01C
0x000
0x004
0x008
0x010
0x014
0x018
0x020
0x024
0x028
Name
QEICTL
QEISTAT
QEIPOS
QEIMAXPOS
QEILOAD
QEITIME
QEICOUNT
QEISPEED
QEIINTEN
QEIRIS
QEIISC
5.
6.
7.
Register Map
Table 17-1 on page 409 lists the QEI registers. The offset listed is a hexadecimal increment to the
register’s address, relative to the module’s base address:
■
Register Descriptions
The remainder of this section lists and describes the QEI registers, in numerical order by address
offset.
QEI0: 0x4002.C000
■
Enable the quadrature encoder by setting bit 0 of the QEICTL register.
Delay for some time.
Read the encoder position by reading the QEIPOS register value.
Write the QEIMAXPOS register with the value of 0x0000.0F9F.
Luminary Micro Confidential-Advance Product Information
R/W1C
Type
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
Reset
Description
QEI Control
QEI Status
QEI Position
QEI Maximum Position
QEI Timer Load
QEI Timer
QEI Velocity Counter
QEI Velocity
QEI Interrupt Enable
QEI Raw Interrupt Status
QEI Interrupt Status and Clear
LM3S1150 Microcontroller
page
See
410
412
413
414
415
416
417
418
419
420
421
409
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