LM3S1150-IQC50-A1 Luminary Micro, Inc., LM3S1150-IQC50-A1 Datasheet - Page 8

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LM3S1150-IQC50-A1

Manufacturer Part Number
LM3S1150-IQC50-A1
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
Table of Contents
List of Figures
Figure 1-1.
Figure 2-1.
Figure 2-2.
Figure 5-1.
Figure 5-2.
Figure 5-3.
Figure 5-4.
Figure 5-5.
Figure 6-1.
Figure 7-1.
Figure 8-1.
Figure 9-1.
Figure 9-2.
Figure 10-1.
Figure 10-2.
Figure 10-3.
Figure 10-4.
Figure 11-1.
Figure 12-1.
Figure 12-2.
Figure 12-3.
Figure 13-1.
Figure 13-2.
Figure 13-3.
Figure 13-4.
Figure 13-5.
Figure 13-6.
Figure 13-7.
Figure 13-8.
Figure 13-9.
Figure 13-10. MICROWIRE Frame Format (Single Frame) .................................................................... 299
Figure 13-11. MICROWIRE Frame Format (Continuous Transfer) ......................................................... 300
Figure 13-12. MICROWIRE Frame Format, SSIFss Input Setup and Hold Requirements ........................ 300
Figure 14-1.
Figure 14-2.
Figure 14-3.
Figure 14-4.
Figure 14-5.
Figure 14-6.
Figure 14-7.
Figure 14-8.
Figure 14-9.
Figure 14-10. Master Burst RECEIVE .................................................................................................. 334
Figure 14-11. Master Burst RECEIVE after Burst SEND ........................................................................ 335
Figure 14-12. Master Burst SEND after Burst RECEIVE ........................................................................ 336
Figure 14-13. Slave Command Sequence ............................................................................................ 337
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Stellaris® Fury-class High-Level Block Diagram ................................................................ 26
CPU Block Diagram ......................................................................................................... 34
TPIU Block Diagram ........................................................................................................ 35
JTAG Module Block Diagram ............................................................................................ 45
Test Access Port State Machine ....................................................................................... 48
IDCODE Register Format ................................................................................................. 53
BYPASS Register Format ................................................................................................ 54
Boundary Scan Register Format ....................................................................................... 54
External Circuitry to Extend Reset .................................................................................... 56
Hibernation Module Block Diagram ................................................................................. 114
Flash Block Diagram ...................................................................................................... 131
GPIODATA Write Example ............................................................................................. 156
GPIODATA Read Example ............................................................................................. 156
GPTM Module Block Diagram ........................................................................................ 196
16-Bit Input Edge Count Mode Example .......................................................................... 200
16-Bit Input Edge Time Mode Example ........................................................................... 201
16-Bit PWM Mode Example ............................................................................................ 202
WDT Module Block Diagram .......................................................................................... 228
UART Module Block Diagram ......................................................................................... 252
UART Character Frame ................................................................................................. 253
IrDA Data Modulation ..................................................................................................... 255
SSI Module Block Diagram ............................................................................................. 291
TI Synchronous Serial Frame Format (Single Transfer) .................................................... 294
TI Synchronous Serial Frame Format (Continuous Transfer) ............................................ 294
Freescale SPI Format (Single Transfer) with SPO=0 and SPH=0 ...................................... 295
Freescale SPI Format (Continuous Transfer) with SPO=0 and SPH=0 .............................. 295
Freescale SPI Frame Format with SPO=0 and SPH=1 ..................................................... 296
Freescale SPI Frame Format (Single Transfer) with SPO=1 and SPH=0 ........................... 297
Freescale SPI Frame Format (Continuous Transfer) with SPO=1 and SPH=0 .................... 297
Freescale SPI Frame Format with SPO=1 and SPH=1 ..................................................... 298
I
I
START and STOP Conditions ......................................................................................... 327
Complete Data Transfer with a 7-Bit Address ................................................................... 328
R/S Bit in First Byte ........................................................................................................ 328
Data Validity During Bit Transfer on the I
Master Single SEND ...................................................................................................... 331
Master Single RECEIVE ................................................................................................. 332
Master Burst SEND ....................................................................................................... 333
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2
C Block Diagram ......................................................................................................... 326
C Bus Configuration .................................................................................................... 327
Luminary Micro Confidential-Advance Product Information
2
C Bus ............................................................... 328
June 14, 2007

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