FDC37C665IR SMSC Corporation, FDC37C665IR Datasheet - Page 115
FDC37C665IR
Manufacturer Part Number
FDC37C665IR
Description
3/5 Volt Advanced High-Performance Multi-Mode Parallel Port Super I/O Floppy Disk Controller with Infranred Support
Manufacturer
SMSC Corporation
Datasheet
1.FDC37C665IR.pdf
(162 pages)
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UART Power Management
Direct power management is controlled by CR2
bits 3 and 7. Refer to CR2 bits 3 and 7 for more
information.
Auto Power Management is enabled by CR7 bits
5 and 6.
following auto power management operations:
1.
2.
Note:
Exit Auto Powerdown
The transmitter exits powerdown on a write to
the XMIT buffer.
powerdown when RXDx changes state.
The transmitter enters auto powerdown
when the transmit buffer and shift register
are empty.
The receiver enters powerdown when the
following conditions are all met:
a.
b.
Receive FIFO is empty
The receiver is waiting for a start bit.
While in powerdown the Ring Indicator
interrupt is still valid and transitions
when the RI input changes.
When set, these bit allows the
The receiver exits auto
115
Parallel Port
Direct power management is controlled by CR1
bit 2. Refer to CR1 bit 2 for more information.
Auto Power Management is enabled by CR7 bit
4. When set, this bit allows the ECP or EPP
logical parallel port blocks to be placed into
powerdown when not being used.
The EPP logic is in powerdown under any of the
following conditions:
1.
2.
The ECP logic is in powerdown under any of the
following conditions:
1.
2
Exit Auto Powerdown
The parallel port logic can change powerdown
modes when the ECP mode is changed through
the ecr register or when the parallel port mode is
changed through the configuration registers.
EPP is not enabled in the configuration
registers.
EPP is not selected through ecr while in
ECP mode.
ECP is not enabled in the configuration
registers.
SPP, PS/2 Parallel port or EPP mode is
selected through ecr while in ECP mode.
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