FDC37C665IR SMSC Corporation, FDC37C665IR Datasheet - Page 126
FDC37C665IR
Manufacturer Part Number
FDC37C665IR
Description
3/5 Volt Advanced High-Performance Multi-Mode Parallel Port Super I/O Floppy Disk Controller with Infranred Support
Manufacturer
SMSC Corporation
Datasheet
1.FDC37C665IR.pdf
(162 pages)
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CR3
This register can only be accessed when the
FDC is in the Configuration Mode and the
BIT NO.
7,2
0
1
3
4
5
6
RESERVED
Enhanced
Floppy Mode
2
Drive Opt 0
Drive Opt 1
MFM
IDENT
ADRx/
DRV2 EN/
PINTR
BIT NAME
Reserved - Read as zero
Bit 1
0
1
These two bits control the DRATE0 and DRATE1 outputs. The mapping
from the DRATE SEL bit of the DSR, DIR AND CCR to the DRATE
outputs is shown in Table 53. Defaults 1, 1 after power-up. If bit 1 = 1,
then bits 3 and 4 become "don't cares".
IDENT is used in conjunction with MFM to define the interface mode of
operation.
ADRx output/DRIVE 2 EN input: When set to a 1, this bit enables the
output. When cleared to a 0 (default) this bit allows the connection of the
Drive 2 indicator.
IDENT
Bit 7
1
1
0
0
0
1
1
Table 52 - CR3
Floppy Mode - Refer to the description of the TAPE
DRIVE REGISTER (TDR) for more information on
these modes.
NORMAL Floppy Mode (Default)
Enhanced Floppy Mode 2 (OS2)
126
MFM
Bit 2
CSR has been initialized to 03H. The default
value after power up is 78H.
1
0
1
0
0
1
x
DESCRIPTION
MODE
AT Mode (Default)
Reserved
PS/2
Model 30
Input DRV2
ADDRX
PINTR2
Pin 94
Pin 39
PINTR
PINTR
High-Z
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