FDC37C672QFP SMSC Corporation, FDC37C672QFP Datasheet - Page 131

• Manufacturer Part Number: FDC37C672QFP
• Description: ENHANCED SUPER I/O CONTROLLER WITH FAST IR
• Manufacturer: SMSC Corporation

Enhanced Super I/O Controller with Fast IR
Datasheet
Note 19.6 This chip uses ISA address bits [A11:A0] to decode the base address of each of its logical devices.
Notes:
SMSC FDC37C672
Interrupt Request
Level
Select 0
Default = 0x00
on Vcc POR or
Reset_Drv
DMA Channel
Select
Default = 0x04
on Vcc POR or
Reset_Drv
An Interrupt is activated by setting the Interrupt Request Level Select 0 register to a non-zero value AND:
for the FDC logical device by setting DMAEN, bit D3 of the Digital Output Register.
for the PP logical device by setting IRQE, bit D4 of the Control Port and in addition
for the PP logical device in ECP mode by clearing serviceIntr, bit D2 of the ecr.
for the Serial Port logical device by setting any combination of bits D0-D3 in the IER
and by setting the OUT2 bit in the UART's Modem Control (MCR) Register.
for the RTC by (refer to the RTC section of this spec.)
for the KYBD by (refer to the KYBD controller section of this spec.)
IRQ pins must tri-state if not used/selected by any Logical Device. Refer to Section 19.2.7 - Note A. Logical
Device IRQ and DMA Operation.
nSMI must be disabled to use IRQ2.
All IRQ’s are available in Serial IRQ mode. Only IRQ[3:7] and IRQ[10:12] are available in Parallel IRQ mode.
NAME
NAME
Table 19.6 - DMA Channel Select Configuration Register Description
REG INDEX
0x70 (R/W)
REG INDEX
0x74 (R/W)
Table 19.5 - Interrupt Select Configuration Register Description
Bits[3:0] selects which interrupt level is used for Interrupt 0.
Notes:
Bits[2:0] select the DMA Channel.
DATASHEET
All interrupts are edge high (except ECP/EPP)
nSMI is active low
0x00= no interrupt selected.
0x01= IRQ1
0x02= IRQ2/nSMI
0x03= IRQ3
0x04= IRQ4
0x05= IRQ6
0x06= IRQ7
0x07= IRQ7
0x08= IRQ8
0x09= IRQ9
0x0A= IRQ10
0x0B= IRQ11
0x0C= IRQ12
0x0D= IRQ13
0x0E= IRQ14
0x0F= IRQ15
0x00= Reserved
0x01= DMA1
0x02= DMA2
0x03= DMA3
0x04-0x07= No DMA active
Page 131
DEFINITION
DEFINITION
Rev. 10-29-03
STATE
STATE
C
C