FDC37C672QFP SMSC Corporation, FDC37C672QFP Datasheet - Page 135

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FDC37C672QFP

Manufacturer Part Number
FDC37C672QFP
Description
ENHANCED SUPER I/O CONTROLLER WITH FAST IR
Manufacturer
SMSC Corporation
Datasheet

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Enhanced Super I/O Controller with Fast IR
Datasheet
Note 19.7 To properly share and IRQ,
SMSC FDC37C672
Serial Port 1
Mode Register
Default = 0x00
on Vcc POR or
Reset_Drv
NAME
1. Configure UART1 (or UART2) to use the desired IRQ pin.
2. Configure UART2 (or UART1) to use No IRQ selected.
3. Set the share IRQ bit.
Note: If both UARTs are configured to use different IRQ pins and the share IRQ bit is set, then both of the
UART IRQ pins will assert when either UART generates an interrupt.
Table 19.9 - Serial Port 1, Logical Device 4 [Logical Device Number = 0x04]
REG INDEX
0xF0 R/W
Bit[0] MIDI Mode
= 0
= 1
Bit[1] High Speed
= 0
= 1
Bit[6:2] Reserved, set to zero
Bit[7]: Share IRQ
=0
=1
See Note 19.7 below.
DATASHEET
MIDI support disabled (default)
MIDI support enabled
High Speed Disabled(default)
High Speed Enabled
UARTS use different IRQs
UARTS share a common IRQ
Page 135
DEFINITION
Rev. 10-29-03
STATE
C

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