XC3S250E Xilinx, Inc., XC3S250E Datasheet - Page 110

• Manufacturer Part Number: XC3S250E
• Description: Spartan-3E FPGA Family
• Manufacturer: Xilinx, Inc.

Table 8: DC Characteristics of User I/Os Using Single-Ended Standards (Continued)
DS312-3 (v1.0) March 1, 2005
Advance Product Specification
Notes:
1.
2.
3.
4.
5.
SSTL2_I
IOSTANDARD Attribute
The numbers in this table are based on the conditions set forth in
Descriptions of the symbols used in this table are as follows:
For the LVCMOS and LVTTL standards: the same V
All Dedicated output pins (DONE and TDO) as well as Dual-Purpose totem-pole output pins (CCLK, D0-D7, BUSY/DOUT, CSO_B, MOSI,
HDC, LDC0-LDC2, and A0-A23) exhibit the characteristics of LVCMOS25 with Slow slew rate; all have 8 mA drive except CCLK, which has
12 mA drive.
Tested according to the relevant PCI specifications. For more information, see "Virtex-II Pro and Spartan-3 3.3V PCI Reference Design"
(XAPP653).
I
I
V
V
V
V
V
V
V
OL
OH
OL
OH
IL
IH
CCO
REF
TT
-- the output current condition under which V
-- the input voltage that indicates a Low logic level
-- the input voltage that indicates a High logic level
-- the output current condition under which V
-- the output voltage that indicates a Low logic level
-- the voltage applied to a resistor termination
-- the output voltage that indicates a High logic level
-- the reference voltage for setting the input switching threshold
-- the supply voltage for output drivers
R
(mA)
I
8.1
OL
OL
OH
Test Conditions
is tested
is tested
OL
and V
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OH
limits apply for both the Fast and Slow slew attributes.
Table 4
(mA)
–8.1
I
OH
and
Table
7.
V
Max (V)
TT
Logic Level Characteristics
DC and Switching Characteristics
V
- 0.61
OL
V
TT
Min (V)
V
+ 0.61
OH
7