XC3S250E Xilinx, Inc., XC3S250E Datasheet - Page 72

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XC3S250E

Manufacturer Part Number
XC3S250E
Description
Spartan-3E FPGA Family
Manufacturer
Xilinx, Inc.
Datasheet

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Table 45: Variant Select Codes for SPI Serial Flash PROMs
PROM and the FPGA’s SPI configuration interface. Each
SPI Flash PROM vendor uses slightly different signal nam-
ing. The SPI Flash PROM’s write protect and hold controls
Table 46: SPI Flash PROM Connections and Pin Naming
DS312-2 (v1.1) March 21, 2005
Advance Product Specification
W
VS2 VS1 VS0
DATA_IN
DATA_OUT
SELECT
CLOCK
WR_PROTECT
HOLD
(see
SPI Flash Pin
1
1
1
Table 46
Figure
Others
W
1
0
1
R
shows the connections between the SPI Flash
50)
1
1
0
MOSI
DIN
CSO_B
CCLK
Not required for FPGA configuration. Must be
High to program SPI Flash. Optional
connection to FPGA user I/O after
configuration.
Not required for FPGA configuration but must
be High during configuration. Optional
connection to FPGA user I/O after
configuration. Not applicable to Atmel
DataFlash.
FAST READ (0x0B)
(see
READ (0x03)
(see
READ ARRAY
(0xE8)
(see
Reserved
Command
SPI Read
Figure
Figure
Figure
FPGA Connection
50)
50)
51)
Dummy
Bytes
1
0
3
www.xilinx.com
STMicroelectronics (ST)
NexFlash
Silicon Storage Technology (SST)
Programmable Microelectronics Corp. (PMC)
STMicroelectronics (ST)
NexFlash
Silicon Storage Technology (SST)
Programmable Microelectronics Corp. (PMC)
Atmel Corporation
are not used by the FPGA during configuration. However,
the HOLD pin must be High during the configuration pro-
cess. The PROM’s write protect input must be High in order
to write or program the Flash memory.
SPI Serial Flash Vendor
STMicro
HOLD
W
Q
D
S
C
NexFlash
HOLD
CLK
WP
DO
CS
DI
Technology
Storage
HOLD#
Silicon
WP#
SCK
CE#
SO
Functional Description
SI
M25Pxx
NX25Pxx
SST25LFxxxA
SST25VFxxxA
Pm25LVxxx
M25Pxx
NX25Pxx
SST25LFxxxA
SST25VFxxxA
SST25VFxxx
Pm25LVxxx
AT45DB DataFlash
SPI Flash Family
DataFlash
Atmel
SCK
WP
N/A
SO
CS
SI
65

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