TN28F010-150 Intel Corporation, TN28F010-150 Datasheet - Page 6

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TN28F010-150

Manufacturer Part Number
TN28F010-150
Description
28F010 1024K (128K X 8) CMOS FLASH MEMORY
Manufacturer
Intel Corporation
Datasheet

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28F010
6
A
DQ
CE#
OE#
WE#
Symbol
0
–A
0
–DQ
16
7
INPUT/OUTPUT
INPUT
INPUT
INPUT
INPUT
Type
ADDRESS INPUTS for memory addresses. Addresses are internally
latched during a write cycle.
DATA INPUT/OUTPUT: Inputs data during memory write cycles; outputs
data during memory read cycles. The data pins are active high and float to
tri-state off when the chip is deselected or the outputs are disabled. Data is
internally latched during a write cycle
CHIP ENABLE: Activates the device's control logic, input buffers, decoders
and sense amplifiers. CE# is active low; CE# high deselects the memory
device and reduces power consumption to standby levels.
OUTPUT ENABLE: Gates the devices output through the data buffers
during a read cycle. OE# is active low.
WRITE ENABLE: Controls writes to the control register and the array. Write
enable is active low. Addresses are latched on the falling edge and data is
latched on the rising edge of the WE# pulse.
Note: With V
Figure 1. 28F010 Block Diagram
Table 1. Pin Description
PP
6.5 V, memory contents cannot be altered.
Name and Function
290207-1

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