LM3S3749 Luminary Micro, Inc, LM3S3749 Datasheet - Page 204

• Manufacturer Part Number: LM3S3749
• Description: Lm3s3749 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Micro Direct Memory Access (μDMA)
9.3.2.2
9.3.2.3
204
3.
4.
Configure the Channel Control Structure
Now the channel control structure must be configured.
This example will transfer 256 32-bit words from one memory buffer to another. Channel 30 is used
for a software transfer, and the control structure for channel 30 is at offset 0x1E0 of the channel
control table. The channel control structure for channel 30 is located at the offsets shown in Table
9-7 on page 204.
Table 9-7. Channel Control Structure Offsets for Channel 30
Configure the Source and Destination
The source and destination end pointers must be set to the last address for the transfer (inclusive).
1.
2.
The control word at offset 0x1E8 must be programmed according to Table 9-8 on page 204.
Table 9-8. Channel Control Word Configuration for Memory Transfer Example
Start the Transfer
Now the channel is configured and is ready to start.
1.
2.
Control Table Base + 0x1E0
Control Table Base + 0x1E4
Control Table Base + 0x1E8
Field in DMACHCTL
DSTINC
DSTSIZE
SRCINC
SRCSIZE
reserved
ARBSIZE
XFERSIZE
NXTUSEBURST
XFERMODE
Set bit 30 of the DMA Channel Useburst Clear (DMAUSEBURSTCLR) register to allow the
μDMA controller to respond to single and burst requests.
Set bit 30 of the DMA Channel Request Mask Clear (DMAREQMASKCLR) register to allow
the μDMA controller to recognize requests for this channel.
Set the source end pointer at offset 0x1E0 to the address of the source buffer + 0x3FC.
Set the destination end pointer at offset 0x1E4 to the address of the destination buffer + 0x3FC.
Enable the channel by setting bit 30 of the DMA Channel Enable Set (DMAENASET) register.
Issue a transfer request by setting bit 30 of the DMA Channel Software Request (DMASWREQ)
register.
Offset
Channel 30 Source End Pointer
Channel 30 Destination End Pointer
Channel 30 Control Word
Description
Preliminary
31:30
29:28
27:26
25:24
23:18
17:14
Bits
13:4
2:0
3
Value
255
2
2
2
2
0
3
0
2
Description
32-bit destination address increment
32-bit destination data size
32-bit source address increment
32-bit source data size
Reserved
Arbitrates after 8 transfers
Transfer 256 items
N/A for this transfer type
Use Auto-request transfer mode
June 02, 2008