LM3S3749 Luminary Micro, Inc, LM3S3749 Datasheet - Page 631
LM3S3749
Manufacturer Part Number
LM3S3749
Description
Lm3s3749 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S3749.pdf
(753 pages)
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June 02, 2008
Bit/Field
15:14
13:12
16
DBRiseUpd
DBFallUpd
FLTSRC
Name
Type
R/W
R/W
R/W
Reset
0
0
0
Preliminary
Description
Fault Condition Source
This bit specifies the fault condition source.
PWMnDBFALL Update Mode
Specifies the update mode for the PWMnDBFALL register.
PWMnDBRISE Update Mode
Specifies the update mode for the PWMnDBRISE register.
Value
0
1
Value
0
1
2
3
Value
0
1
2
3
Description
Fault0
Register-Defined
Two registers (PWMnFLTINPUT and PWMnCMPSRC) specify
the fault condition source.
Description
Immediate
The PWMnDBFALL register value is immediately updated on
a write.
Reserved
Locally Synchronized
Updates to the register are reflected to the generator the next
time the counter is 0.
Globally Synchronized
Updates to the register are delayed until the next time the
counter is 0 after a synchronous update has been requested
through the PWM Master Control (PWMCTL) register.
Description
Immediate
The PWMnDBRISE register value is immediately updated on
a write.
Reserved
Locally Synchronized
Updates to the register are reflected to the generator the next
time the counter is 0.
Globally Synchronized
Updates to the register are delayed until the next time the
counter is 0 after a synchronous update has been requested
through the PWM Master Control (PWMCTL) register.
LM3S3749 Microcontroller
631
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