LM3S3749 Luminary Micro, Inc, LM3S3749 Datasheet - Page 295
LM3S3749
Manufacturer Part Number
LM3S3749
Description
Lm3s3749 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S3749.pdf
(753 pages)
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Part Number:
LM3S3749-IQC50-A0
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Texas Instruments
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Reset
Reset
Type
Type
GPIO PrimeCell Identification 2 (GPIOPCellID2)
GPIO Port A (legacy) base: 0x4000.4000
GPIO Port A (high-speed) base: 0x4005.8000
GPIO Port B (legacy) base: 0x4000.5000
GPIO Port B (high-speed) base: 0x4005.9000
GPIO Port C (legacy) base: 0x4000.6000
GPIO Port C (high-speed) base: 0x4005.A000
GPIO Port D (legacy) base: 0x4000.7000
GPIO Port D (high-speed) base: 0x4005.B000
GPIO Port E (legacy) base: 0x4002.4000
GPIO Port E (high-speed) base: 0x4005.C000
GPIO Port F (legacy) base: 0x4002.5000
GPIO Port F (high-speed) base: 0x4005.D000
GPIO Port G (legacy) base: 0x4002.6000
GPIO Port G (high-speed) base: 0x4005.E000
GPIO Port H (legacy) base: 0x4002.7000
GPIO Port H (high-speed) base: 0x4005.F000
Offset 0xFF8
Type RO, reset 0x0000.0005
June 02, 2008
Bit/Field
31:8
7:0
RO
RO
31
15
0
0
RO
RO
Register 32: GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8
The GPIOPCellID0, GPIOPCellID1, GPIOPCellID2, and GPIOPCellID3 registers are four 8-bit wide
registers, that can conceptually be treated as one 32-bit register. The register is used as a standard
cross-peripheral identification system.
30
14
0
0
RO
RO
29
13
reserved
0
0
Name
CID2
RO
RO
28
12
0
0
reserved
RO
RO
27
11
0
0
Type
RO
RO
RO
RO
26
10
0
0
RO
RO
Reset
25
0x00
0x05
0
9
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
GPIO PrimeCell ID Register[23:16]
Provides software a standard cross-peripheral identification system.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
CID2
RO
RO
19
0
3
0
LM3S3749 Microcontroller
RO
RO
18
0
2
1
RO
RO
17
0
1
0
RO
RO
16
0
0
1
295
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