MT16VDDF12864HG-26A Micron, MT16VDDF12864HG-26A Datasheet - Page 17

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MT16VDDF12864HG-26A

Manufacturer Part Number
MT16VDDF12864HG-26A
Description
DRAM_Module, high-speed CMOS, dynamic random-access, 512MB and 1GB memory modules organized in a x64 configuration
Manufacturer
Micron
Datasheet
Table 16: DDR SDRAM Component Electrical Characteristics and Recommended AC
Notes: 1–5, 12–15, 29, 40; notes appear on pages 19–22; 0°C £ T
09005aef80a646bc
DDF16C64_128x64HG_A.fm - Rev. A 3/03 EN
AC CHARACTERISTICS
PARAMETER
Access window of DQs from CK/CK#
CK high-level width
CK low-level width
Clock cycle time
DQ and DM input hold time relative to DQS
DQ and DM input setup time relative to DQS
DQ and DM input pulse width (for each input)
Access window of DQS from CK/CK#
DQS input high pulse width
DQS input low pulse width
DQS-DQ skew, DQS to last DQ valid, per group,
per access
Write command to first DQS latching transition
DQS falling edge to CK rising - setup time
DQS falling edge from CK rising - hold time
Half clock period
Data-out high-impedance window from CK/CK#
Data-out low-impedance window from CK/CK#
Address and control input hold time (fast slew
rate)
Address and control input setup time (fast slew rate)
Address and control input hold time (slow slew rate)
Address and control input setup time (slow slew
rate)
LOAD MODE REGISTER command cycle time
DQ-DQS hold, DQS to first DQ to go non-valid,
per access
Data hold skew factor
ACTIVE to PRECHARGE command
ACTIVE to READ with Auto precharge command
ACTIVE to ACTIVE/AUTO REFRESH command
period
AUTO REFRESH command period
ACTIVE to READ or WRITE delay
PRECHARGE command period
DQS read preamble
Operating Conditions (-26A, -265, -202)
CL=2.5
CL=2
SYMBOL MIN
t
t
CK (2.5)
t
t
DQSCK -0.75 +0.75
t
t
t
t
t
t
CK (2)
DQSH
DQSQ
t
DIPW
DQSL
DQSS
t
t
t
t
t
t
RPRE
MRD
t
t
t
t
DSH
t
t
QHS
RCD
t
t
t
RAS
RAP
t
t
DSS
t
t
t
RFC
t
DH
QH
AC
CH
IH
IH
DS
HP
HZ
RC
RP
CL
LZ
IS
IS
F
S
F
S
17
-0.75 +0.75
-0.75
0.45
0.45
1.75
0.35
0.35
0.75
7.5
7.5
0.5
0.5
0.2
0.2
.90
.90
0.9
15
40
20
65
75
20
20
A
1
1
t
HP -
t
£ +70°C; V
CH,
-26A
120,000
t
+0.75
MAX
t
QHS
0.55
0.55
1.25
0.75
CL
0.5
1.1
13
13
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD
-0.75
-0.75
-0.75
MIN
0.45
0.45
1.75
0.35
0.35
0.75
0.90
0.90
7.5
0.5
0.5
0.2
0.2
0.9
10
15
40
20
65
75
20
20
= V
1
1
t
HP -
t
CH,
-265
DD
200-PIN DDR SODIMM
120,000 40 120,000
t
t
QHS
Q = +2.5V ±0.2V
MAX MIN MAX
+0.75
+0.75
+0.75
CL
0.55
0.55
1.25
0.75
0.5
1.1
13
13
512MB, 1GB (x64)
0.45
0.45
0.35
0.35
0.75
-0.8
-0.8
-0.8
0.6
0.6
0.2
0.2
1.1
1.1
1.1
1.1
0.9
10
16
20
70
80
20
20
8
2
t
HP -
t
CH,
-202
t
t
QHS
+0.8
0.55
0.55
+0.8
1.25
+0.8
CL
0.6
1.1
13
13
1
UNITS NOTES
©2003, Micron Technology Inc.
t
t
t
t
t
t
t
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CK
CK
CK
CK
CK
CK
CK
CK
ADVANCE
40, 46
40, 46
23, 27
23, 27
22, 23
16, 37
16, 38
22, 23
26
26
27
30
12
12
12
12
31
44
37

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