MT16VDDF12864HG-26A Micron, MT16VDDF12864HG-26A Datasheet - Page 22

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MT16VDDF12864HG-26A

Manufacturer Part Number
MT16VDDF12864HG-26A
Description
DRAM_Module, high-speed CMOS, dynamic random-access, 512MB and 1GB memory modules organized in a x64 configuration
Manufacturer
Micron
Datasheet
09005aef80a646bc
DDF16C64_128x64HG_A.fm - Rev. A 3/03 EN
44. CKE must be active (high) during the entire time a
45. IDD2N specifies the DQ, DQS, and DM to be
refresh command is executed. That is, from the
time the AUTO REFRESH command is registered,
CKE must be active at each rising clock edge, until
t
driven to a valid high or low logic level. IDD2Q is
similar to IDD2F except IDD2Q specifies the
address and control inputs to remain stable.
REF later.
22
46. Whenever the operating frequency is altered, not
47. Leakage number reflects the worst case leakage
Although IDD2F, IDD2N, and IDD2Q are similar,
IDD2F is “worst case.”
including jitter, the DLL is required to be reset.
This is followed by 200 clock cycles.
possible through the module pin, not what each
memory device contributes.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
200-PIN DDR SODIMM
512MB, 1GB (x64)
©2003, Micron Technology Inc.
ADVANCE

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