LTC2412 Linear Technology, LTC2412 Datasheet - Page 15

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LTC2412

Manufacturer Part Number
LTC2412
Description
2-Channel Differential Input 24-Bit No Latency DS ADC
Manufacturer
Linear Technology
Datasheet

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APPLICATIO S I FOR ATIO
Frequency Rejection Selection (F
The LTC2412 internal oscillator provides better than 110dB
normal mode rejection at the line frequency and all its
harmonics for 50Hz 2% or 60Hz 2%. For 60Hz rejec-
tion, F
rejection the F
The selection of 50Hz or 60Hz rejection can also be made
by driving F
change during the sleep or data output states will not
disturb the converter operation. If the selection is made
during the conversion state, the result of the conversion in
progress may be outside specifications but the following
conversions will not be affected.
When a fundamental rejection frequency different from
50Hz or 60Hz is required or when the converter must be
synchronized with an outside source, the LTC2412 can
operate with an external conversion clock. The converter
automatically detects the presence of an external clock
signal at the F
frequency f
2560Hz (1Hz notch frequency) to be detected. The exter-
nal clock signal duty cycle is not significant as long as the
minimum and maximum specifications for the high and
low periods t
While operating with an external conversion clock of a
frequency f
O
Table 2. LTC2412 Output Data Format
Differential Input Voltage
V
V
0.5 • V
0.25 • V
0.25 • V
0
–1LSB
– 0.25 • V
– 0.25 • V
– 0.5 • V
V
*The differential input voltage V
**The differential reference voltage V
IN
IN
IN
should be connected to GND while for 50Hz
*
* 0.5 • V
* < –0.5 • V
EOSC
EOSC
O
REF
HEO
O
REF
REF
REF
O
to an appropriate logic level. A selection
pin and turns off the internal oscillator. The
REF
REF
** – 1LSB
, the LTC2412 provides better than 110dB
pin should be connected to V
**
** – 1LSB
**
of the external signal must be at least
and t
**
** – 1LSB
REF
REF
U
**
**
LEO
U
are observed.
IN
= IN
O
Bit 31
W
EOC
REF
)
0
0
0
0
0
0
0
0
0
0
+
– IN
= REF
.
CH0/CH1
Bit 30
+
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
– REF
CC
U
.
.
Bit 29
SIG
1
1
1
1
1
0
0
0
0
0
Bit 28
MSB
normal mode rejection in a frequency range f
function of the input frequency deviation from f
is shown in Figure 4.
Whenever an external clock is not present at the F
converter automatically activates its internal oscillator and
enters the Internal Conversion Clock mode. The LTC2412
operation will not be disturbed if the change of conversion
clock source occurs during the sleep state or during the
data output state while the converter uses an external
serial clock. If the change occurs during the conversion
state, the result of the conversion in progress may be
1
0
0
0
0
1
1
1
1
0
4% and its harmonics. The normal mode rejection as a
Figure 4. LTC2412 Normal Mode Rejection When
Using an External Oscillator of Frequency f
Bit 27
0
1
1
0
0
1
1
0
0
1
–100
–105
–110
–115
–120
–125
–130
–135
–140
–80
–85
–90
–95
DEVIATION FROM NOTCH FREQUENCY f
–12
DIFFERENTIAL INPUT SIGNAL FREQUENCY
Bit 26
0
1
0
1
0
1
0
1
0
1
–8
–4
Bit 25
0
1
0
1
0
1
0
1
0
1
0
4
EOSC
8
LTC2412
/2560(%)
2412 F04
Bit 0
0
1
0
1
0
1
0
1
0
1
12
EOSC
EOSC
EOSC
O
15
pin, the
/2560
/2560
2412f

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