LTC2412 Linear Technology, LTC2412 Datasheet - Page 22

• Manufacturer Part Number: LTC2412
• Description: 2-Channel Differential Input 24-Bit No Latency DS ADC
• Manufacturer: Linear Technology

APPLICATIO S I FOR ATIO
LTC2412
PRESERVING THE CONVERTER ACCURACY
The LTC2412 is designed to reduce as much as possible
the conversion result sensitivity to device decoupling,
PCB layout, antialiasing circuits, line frequency perturba-
tions and so on. Nevertheless, in order to preserve the
extreme accuracy capability of this part, some simple
precautions are desirable.
Digital Signal Levels
The LTC2412’s digital interface is easy to use. Its digital
inputs (F
accept standard TTL/CMOS logic levels and the internal
hysteresis receivers can tolerate edge rates as slow as
100 s. However, some considerations are required to take
advantage of the exceptional accuracy and low supply
current of this converter.
The digital output signals (SDO and SCK in Internal SCK
mode of operation) are less of a concern because they are
not generally active during the conversion state.
While a digital input signal is in the range 0.5V to
(V
current from the power supply. It should be noted that,
when any one of the digital input signals (F
22
(INTERNAL)
CC
– 0.5V), the CMOS input receiver draws additional
SDO
SCK
CS
O
, CS and SCK in External SCK mode of operation)
CONVERSION
U
U
BIT 31
EOC
CH0/CH1
BIT 30
Figure 10. Internal Serial Clock, Continuous Operation
W
ANALOG INPUT RANGE
–0.5V
BIT 29
O
SIG
, CS and SCK
REF
TO 0.5V
0.1V TO V
U
REFERENCE
VOLTAGE
BIT 28
MSB
1 F
2.7V TO 5.5V
REF
CC
1
2
3
4
5
6
7
BIT 27
V
REF
REF
CH0
CH0
CH1
CH1
CC
DATA OUTPUT
LTC2412
in External SCK mode of operation) is within this range, the
LTC2412 power supply current may increase even if the
signal in question is at a valid logic level. For micropower
operation, it is recommended to drive all digital input
signals to full CMOS levels [V
(V
During the conversion period, the undershoot and/or
overshoot of a fast digital signal connected to the LTC2412
pins may severely disturb the analog to digital conversion
process. Undershoot and overshoot can occur because of
the impedance mismatch at the converter pin when the
transition time of an external control signal is less than
twice the propagation delay from the driver to LTC2412.
For reference, on a regular FR-4 board, signal propagation
velocity is approximately 183ps/inch for internal traces
and 170ps/inch for surface traces. Thus, a driver gener-
ating a control signal with a minimum transition time of
1ns must be connected to the converter pin through a
trace shorter than 2.5 inches. This problem becomes
particularly difficult when shared control lines are used
and multiple reflections may occur. The solution is to
carefully terminate all transmission lines close to their
characteristic impedance.
+
–
+
–
+
–
CC
BIT 26
GND
SDO
SCK
CS
F
– 0.4V)].
O
14
13
12
11
8, 9, 10, 15, 16
2-WIRE
INTERFACE
V
CC
= 50Hz REJECTION
= EXTERNAL OSCILLATOR
= 60Hz REJECTION
LSB
BIT 5
24
IL
< 0.4V and V
BIT 0
CONVERSION
OH
2412 F10
2412f
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