spd6722qcce Intel Corporation, spd6722qcce Datasheet - Page 114
spd6722qcce
Manufacturer Part Number
spd6722qcce
Description
Isa-to-pc-card Pcmcia Controllers
Manufacturer
Intel Corporation
Datasheet
1.SPD6722QCCE.pdf
(138 pages)
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers
114
1. The Setup time is determined by the value programmed into the Setup Timing register, index 3Ah/3Dh. Using the Timer Set
2. The Command time is determined by the value programmed into the Command Timing register, index 3Bh/3Eh. Using the
3. The Recovery time is determined by the value programmed into the Recovery Timing register, index 3Ch/3Fh. Using the
-IOWR, -IORD,
Symbol
0 default value of 01h, the setup time would be 70 ns. S = (N
page
Timer Set 0 default value of 06h, the Command time would be 270 ns. C = (N
Timer Set 0 default value of 03h, the hold (Recovery) time would be 150 ns. R = (N
Figure 25. PC Card Read/Write Timing When System Is 8-Bit (SBHE Tied High)
Table 34. Normal Byte Read/Write Timing
Read Cycle
Write Cycle
Write Cycle
t
t
t
1
2
3
-OE, -WE
109.
Read or
A[25:0]
D[15:8]
D[7:0]
-REG,
D[7:0]
-CE1
Address setup to Command active
Command pulse width
Address hold from Command inactive
2
t
1
Parameter
1
3
Odd/even Data
XX
pres
t
2
N
val
Odd/Even Data
+ 1), see
t
4
pres
“PC Card Bus Timing Calculations” on
pres
N
(S
(C
(R
val
t
5
+ 1), see page 109.
N
Tcp) – 10
Tcp) – 10
Tcp) – 10
val
MIN
+ 1), see page 109.
t
3
MAX
Datasheet
ns
ns
ns
Units
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