spd6722qcce Intel Corporation, spd6722qcce Datasheet - Page 70

• Manufacturer Part Number: spd6722qcce
• Description: Isa-to-pc-card Pcmcia Controllers
• Manufacturer: Intel Corporation

PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers
10.0
10.1
70
Register Name: Misc Control 1
Index: 16h
1. On some versions of the PD6722, this bit can be used to read levels of the A_GPSTB and B_GPSTB pins.
Enable
Inpack
RW:0
Bit 7
Extension Registers
Misc Control 1
Bit 0 — 5 V Detect (PD6710 only)
This bit is connected to pins VS1 and VS2. Cards that will only operate at 3.3 V will drive this bit
to ‘0’.
Bit 1 — V
This bit determines which output pin is to be used to enable V
power is to be applied; it is used in conjunction with bits 5:4 of the Power Control register (see
“Power Control” on page
Bit 2 — Pulse Management Interrupt
This bit selects Level or Pulse mode operation of the IRQ[XX] or -INTR pin being used for card
status change management interrupts (see
incoming CLK for pulsed interrupts to work.
Bit 6
Scratchpad Bits
0
1
0
1
0
1
RW:00
CC
3.3 V card detected.
Old or 5 V card detected.
-VCC_5 activated when card power is to be applied.
-VCC_3 activated when card power is to be applied.
Card status change management interrupts are passed to the appropriate IRQ[XX] or -INTR pin
as level-sensitive.
When a card status change management interrupt occurs, the appropriate IRQ[XX] or -INTR
pin is driven with the pulse train shown in
3.3V
Bit 5
48).
Speaker
Enable
RW:0
Bit 4
Table
Pulse System
RW:0
Bit 3
IRQ
1). Note that a clock must be present on the
Figure 11
Management
Interrupt
and allows for interrupt sharing.
Pulse
RW:0
Bit 2
CC
power to the socket when card
Register Compatibility Type: ext.
V
CC
RW:0
Bit 1
3.3V
Register Per: socket
Datasheet
5 V Detect
Reserved
(PD6710)
(PD6722)
R:X W:0
Bit 0
1