spd6722qcce Intel Corporation, spd6722qcce Datasheet - Page 115

• Manufacturer Part Number: spd6722qcce
• Description: Isa-to-pc-card Pcmcia Controllers
• Manufacturer: Intel Corporation

Datasheet
IOWR, -IORD,
1. The Setup time is determined by the value programmed into the Setup Timing register, index 3Ah/3Dh. Using the Timer Set
2. The Command time is determined by the value programmed into the Command Timing register, index 3Bh/3Eh. Using the
3. The Recovery time is determined by the value programmed into the Recovery Timing register, index 3Ch/3Fh. Using the
4. -IOIS16 level from card should be valid before -IOWR/-IORD goes active. For a typical setup time of 70 ns, a PC Card
Read Cycle
NOTE:
Symbol
Write Cycle
Write Cycle
0 default value of 01h, the setup time would be 70 ns. S = (N
page
Timer Set 0 default value of 06h, the Command time would be 270 ns. C = (N
Timer Set 0 default value of 03h, the hold (Recovery) time would be 150 ns. R = (N
meeting the PCMCIA specification for -IOIS16 from A[25:0] change will meet this condition.
Figure 26. Normal Byte Read/Write Timing
Table 35. 16-Bit System to 8-Bit I/O Card: Odd Byte Timing
t
t
t
t
t
t
-OE, -WE
1
2
3
4
5
6
Read or
A[25:0]
D[7:0]
D[15:8]
D[7:0]
-REG,
109.
-CE1
-CE2
Figure 26
x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x
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x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x
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x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x
applies to all other byte accesses, including odd I/O cycles where -IOIS16 is low.
Address hold from Command inactive
Address change to -IOIS16 inactive
Address setup to Command active
-IOIS16 inactive to -CE2 inactive
-IOIS16 inactive to -CE1 active
Command pulse width
t
1
Parameter
Odd/Even Data
2
ISA-to-PC-Card (PCMCIA) Controllers — PD6710/’22
XX
pres
1
t
4
2
3
N
val
Odd/Even Data
+ 1), see
pres
“PC Card Bus Timing Calculations” on
(S
(C
(R
pres
N
val
Tcp) – 10
Tcp) – 10
Tcp) – 10
MIN
+ 1), see page 109.
N
val
+ 1), see page 109.
(3Tcp) + 10
t
3
MAX
20
20
Units
ns
ns
ns
ns
ns
ns
x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x
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x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x
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