spd6722qcce Intel Corporation, spd6722qcce Datasheet - Page 55

• Manufacturer Part Number: spd6722qcce
• Description: Isa-to-pc-card Pcmcia Controllers
• Manufacturer: Intel Corporation

7.7
Datasheet
Register Name: Mapping Enable
Index: 06h
I/O Map 1
Enable
RW:0
Bit 7
Bit 3 — Card Detect Enable
When this bit is ‘1’, a management interrupt will occur when the Card Status Change register’s
Card Detect Change bit (see
Bits 7:4 — Management IRQ Select
These bits determine which interrupt pin will be used for card status change management
interrupts.
Mapping Enable
I/O Map 0
Enable
RW:0
Bit 6
0000
0001
0010
0011
0100
0101
0110
1000
1001
1010
1011
1100
1101
0111
1110
1111
0
1
Card Detect Change management interrupt disabled.
If Card Detect Change is ‘1’, a management interrupt will occur.
IRQ disabled
Reserved
Reserved
IRQ 3
IRQ 4
IRQ 5
Reserved
IRQ 7
Reserved
IRQ 9 (On the PD6722, this output may alternately be used as an ISA bus DACK* signal)
IRQ 10 (On the PD6722, this output may alternately be used as an ISA bus DRQ signal)
IRQ 11
IRQ 12 (This output may alternately be used for LED)
Reserved
IRQ 14
IRQ 15 (This output may alternately be used for ring indicate)
Full Decode
MEMCS16
RW:0
Bit 5
Memory Map
“Bit 3 — Card Detect Change” on page
4 Enable
RW:0
Bit 4
ISA-to-PC-Card (PCMCIA) Controllers — PD6710/’22
Memory Map
3 Enable
RW:0
Bit 3
Memory Map
2 Enable
RW:0
Bit 2
53) is ‘1’.
Register Compatibility Type: 365
Memory Map
1 Enable
RW:0
Bit 1
Register Per: socket
Memory Map
0 Enable
RW:0
Bit 0
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