upd78f0114hgb-8es-a Renesas Electronics Corporation., upd78f0114hgb-8es-a Datasheet - Page 336

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upd78f0114hgb-8es-a

Manufacturer Part Number
upd78f0114hgb-8es-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet

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(1) HALT mode
(2) STOP mode
set are held. The I/O port output latches and output buffer statuses are also held.
336
The standby function is designed to reduce the operating current of the system. The following two modes are
In either of these two modes, all the contents of registers, flags and data memory just before the standby mode is
Cautions 1. STOP mode can be used only when CPU is operating on the high-speed system clock or
HALT instruction execution sets the HALT mode. In the HALT mode, the CPU operation clock is stopped. If the
high-speed system clock oscillator, internal oscillator, or subsystem clock oscillator is operating before the HALT
mode is set, oscillation of each clock continues. In this mode, the operating current is not decreased as much as
in the STOP mode, but the HALT mode is effective for restarting operation immediately upon interrupt request
generation and carrying out intermittent operations.
STOP instruction execution sets the STOP mode. In the STOP mode, the high-speed system clock oscillator
stops, stopping the whole system, thereby considerably reducing the CPU operating current.
Because this mode can be released by an interrupt request, it enables intermittent operations to be carried out.
However, because a wait time is required to secure the oscillation stabilization time after the STOP mode is
released, select the HALT mode if it is necessary to start processing immediately upon interrupt request
generation.
2. When shifting to the STOP mode, be sure to stop the peripheral hardware operation before
3. The following sequence is recommended for operating current reduction of the A/D converter
4. If the internal oscillator is operating before the STOP mode is set, oscillation of the internal
internal oscillation clock. HALT mode can be used when CPU is operating on the high-speed
system clock, internal oscillation clock, or subsystem clock.
instruction is executed during internal oscillation clock operation, the high-speed system
clock oscillator stops, but internal oscillator does not stop.
executing STOP instruction.
when the standby function is used: First clear bit 7 (ADCS) of the A/D converter mode
register (ADM) to 0 to stop the A/D conversion operation, and then execute the HALT or STOP
instruction.
oscillation clock cannot be stopped in the STOP mode.
oscillation clock is used as the CPU clock, the CPU operation is stopped for 17/f
STOP mode is released.
CHAPTER 17 STANDBY FUNCTION
User’s Manual U16961EJ4V0UD
However, when the internal
However, when the STOP
R
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