upd78f0114hgb-8es-a Renesas Electronics Corporation., upd78f0114hgb-8es-a Datasheet - Page 502

• Manufacturer Part Number: upd78f0114hgb-8es-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

E.1 Major Revisions in This Edition
E.2 Revision History up to Previous Edition
each edition in which the revision was applied.
502
Throughout
p. 17
p. 43
p. 44
p. 45
p. 46
p. 52
p. 99
p. 223
p. 238
p. 369
p. 378
p. 396
p. 407
p. 408
p. 441
p. 458
3rd edition
The following table shows the revision history up to this edition. The “Applied to:” column indicates the chapters of
Edition
Page
Modification of supply voltage range with high-speed system clock to 2.5 to 5.5V.
Addition of lead-free products in 1.3 Ordering Information
Modification of 1.5 Kx1 Series Lineup
Modification of recommended connection for unused RESET pin in Table 2-2. Pin I/O
Circuit Types
Modification of Figure 3-4. Memory Map ( PD78F0114HD)
Addition of Caution in 5.3 (6) Oscillation stabilization time select register (OSTS)
Deletion of (7) System wait control register (VSWC) in 5.3 Registers Controlling
Clock Generator
PD78F0112HGB-8ES-A, PD78F0113HGB-8ES-A, PD78F0114HGB-8ES-A
PD78F0114HDGB-8ES-A
Addition of product name, specification, and classification by case on (A) grade products and (A1) grade
products
Modification of Note and Caution in serial operation mode register (CSIM10) and serial clock selection register
(CSIC10)
Modification of 1.3 Ordering Information
Modification of Figure 3-1. Memory Map ( PD78F0112H)
Modification of Figure 3-2. Memory Map ( PD78F0113H)
Modification of Figure 3-3. Memory Map ( PD78F0114H)
Modification of Figure 3-4. Memory Map ( PD78F0114HD)
Modification of Notes 1 and 2 in Figure 3-8. Correspondence Between Data Memory and Addressing
( PD78F0114HD)
Addition of Note 5 to Figure 5-2. Format of Processor Clock Control Register (PCC)
Modification of Figure 11-2. Circuit Configuration of Series Resistor String
Modification of description in 11.6 (1) Operating current in standby mode
Modification of Note and addition of Caution 2 in Figure 21-3. Format of Low-Voltage Detection Level
Selection Register (LVIS)
Revision of CHAPTER 22 OPTION BYTE
Modification of Table 23-7. Communication Modes
Modification of Notes 1 and 2 in Figure 23-22. Memory Map and Boot Area (4) PD78F0114HD
Revision of CHAPTER 24 ON-CHIP DEBUG FUNCTION ( PD78F0114HD ONLY)
Addition of CHAPTER 27 ELECTRICAL SPECIFICATIONS ((A1) GRADE PRODUCTS)
Revision of CHAPTER 29 RECOMMENDED SOLDERING CONDITIONS
APPENDIX E REVISION HISTORY
User’s Manual U16961EJ4V0UD
Description
Description
Throughout
CHAPTER 1 OUTLINE
CHAPTER 2 PIN
FUNCTIONS
CHAPTER 3 CPU
ARCHITECTURE
CHAPTER 5 CLOCK
GENERATOR
Applied to:
(1/3)