upd78f0114hgb-8es-a Renesas Electronics Corporation., upd78f0114hgb-8es-a Datasheet - Page 482

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upd78f0114hgb-8es-a

Manufacturer Part Number
upd78f0114hgb-8es-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet

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16-Bit
Timer/
Event
Counter
00
Function
16-bit timer
capture/
compare
register 000,010
(CR0000,CR010)
PPG output
operation
Pulse width
measurement
External event
counter
One-shot pulse
output with
software trigger
One-shot pulse
output with
external trigger
Timer start
errors
16-bit timer
capture/compar
e register 000
setting
Details of
Function
operation using the following procedure.
Values in the following range should be set in CR000 and CR010:
0000H
The pulse generated through PPG output has a cycle of [CR00n setting value +1],
and a duty of [(CR01n setting value + 1)/(CR00n setting value + 1)].
In the PPG output operation, change the pulse width (rewrite CR010) during TM00
<1> Disable the timer output inversion operation by match of TM00 and CR010
<2> Disable the INTTM010 interrupt (TMMK010 = 1)
<3> Rewrite CR010
<4> Wait for 1 cycle of the TM00 count clock
<5> Enable the timer output inversion operation by match of TM00 and CR010
<6> Clear the interrupt request flag of INTTM010 (TMIF010 = 0)
<7> Enable the INTTM010 interrupt (TMMK010 = 0)
To use two capture registers, set the TI000 and TI010 pins.
When reading the external event counter count value, TM00 should be read.
Do not set the OSPT00 bit to 1 while the one-shot pulse is being output. To
output the one-shot pulse again, wait until the current one-shot pulse output is
completed.
When using the one-shot pulse output of 16-bit timer/event counter 00 with a
software trigger, do not change the level of the TI000 pin or its alternate-function
port pin.
Because the external trigger is valid even in this case, the timer is cleared and
started even at the level of the TI000 pin or its alternate-function port pin, resulting
in the output of a pulse at an undesired timing.
Do not set the CR000 and CR010 registers to 0000H.
16-bit timer counter 00 starts operating as soon as a value other than 00
(operation stop mode) is set to the TMC003 and TMC002 bits.
Do not input the external trigger again while the one-shot pulse is being output.
To output the one-shot pulse again, wait until the current one-shot pulse output is
completed.
Do not set the CR000 and CR010 registers to 0000H.
16-bit timer counter 00 starts operating as soon as a value other than 00
(operation stop mode) is set to the TMC003 and TMC002 bits.
An error of up to one clock may occur in the time required for a match signal to be
generated after timer start. This is because 16-bit timer counter 00 (TM00) is
started asynchronously to the count clock.
In the mode in which clear & start occurs on a match between TM00 and CR000,
set 16-bit timer capture/compare register 000 (CR000) to other than 0000H. This
means a 1-pulse count operation cannot be performed when 16-bit timer/event
counter 00 is used as an external event counter.
(TOC004 = 0)
(TOC004 = 1)
APPENDIX D LIST OF CAUTIONS
CR010 < CR000
User’s Manual U16961EJ4V0UD
FFFFH
Cautions
p. 156
p. 139
p. 139
p. 140
p. 141
p. 150
p. 153
p. 153
p. 154
p. 155
p. 155
p. 157
p. 158
p. 158
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