s29ns01gs Meet Spansion Inc., s29ns01gs Datasheet - Page 16

• Manufacturer Part Number: s29ns01gs
• Description: S29ns01gs 1024 Megabit 128 Megabyte 16-bit Data Width, Burst Access, Simultaneous Read/write, 1.8 Volt-only Flash Memory In 65 Nm Mirrorbit Technology
• Manufacturer: Meet Spansion Inc.

6.2
16
Flash Memory Array
Because the number of address signals monitored for these patterns do not always match three hex
characters (12 bits) and the patterns shift by one bit depending on whether the point of reference is word or
byte address, there has been past confusion from the documentation of the correct address to use in each
command. To reduce the chance for future confusion each address pattern has been given a specific name
and binary documentation as follows:
CAP1 = Command Address Pattern 1 which is a merge (concatenation) of the upper address bits selecting
the target sector with a first bit pattern. The Flash word address signals Amax to A12 must contain the target
sector address and A11 to A0 must contain a binary bit pattern of 0101_0101_0101. In terms of a system byte
address (typically used in software) the upper address bits a-max to a13 are merged with a binary bit pattern
of 0_1010_1010_1010 on a12 to a0.
CAP2 = Command Address Pattern 2 where the Flash word address signals Amax to A12 must contain the
target sector address and A11 to A0 must contain a binary bit pattern of 1010_1010_1010. In terms of a
system byte address the upper address bits a-max to a13 are merged with a binary bit pattern of
1_0101_0101_0100 on a12 to a0. The LSB of byte address must be zero to ensure a word aligned address to
place the command data in the lower order byte lane.
CAP3 = Command Address Pattern 3 where the Flash word address signals Amax to A12 must contain the
sector address and A11 to A0 must contain a binary bit pattern of xxxx_0101_0101 (upper bits are don’t
care). In terms of a system byte address the upper address bits a-max to a13 are merged with a binary bit
pattern of x_xxxx_1010_1010 on a12 to a0.
The Non-Volatile Flash Memory Array is organized as shown in the following tables.
Note
The table has been condensed to show sector-related information for an entire device on a single page. Sectors and their address ranges
that are not explicitly listed (such as SA008–SA009) have sector starting and ending addresses that form the same pattern as all other
sectors of that size. For example, all 128 KB sectors have the byte address pattern x000000h–x1FFFFh.
(Mbit)
Bank
Size
Word Address
64
Byte Address
Name
CAP1
CAP2
CAP3
Sector
Count
1024
Sector Size
(KByte)
Upper Address
A-max to A12
128
a-max to a13
Target Sector
Table 6.2 S29NS01GS 16 Bank Memory Map - Uniform Sectors
S29NS-S MirrorBit
Bank
D a t a
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
Table 6.1 Command Address Patterns
A11
a12
SA960–SA1023
SA000–SA063
SA064–SA127
SA128–SA191
SA192–SA255
SA256–SA319
SA320–SA383
SA384–SA447
SA448–SA511
SA512–SA575
SA576–SA639
SA640–SA703
SA704–SA767
SA768–SA831
SA832–SA895
SA896–SA959
0
1
X
Sector
Range
S h e e t
®
A10
a11
X
Eclipse
1
0
a10
A9
X
0
1
™
1C00000h–1FFFFFFh 3800000h–3FFFFFFh
3C00000h–3FFFFFFh 7800000h–7FFFFFFh
3800000h–3BFFFFFh
Flash Family
000000h–3FFFFFh
( P r e l i m i n a r y )
A8
a9
1
0
X
Range (word)
Address
A7
a8
X
0
1
A6
a7
Lower Address
1
0
1
A5
7000000h–77FFFFFh
a6
0
1
0
000000h–7FFFFFh
Range (byte)
Address
A4
a5
1
0
1
S29NS-S_00_02 April 20, 2009
A3
a4
0
1
0
A2
a3
1
0
1
Sector Starting
A1
Sector Ending
a2
0
1
0
Address –
Address
Notes
A0
a1
1
0
1
a0
0
0
0