s908qc16vdse Freescale Semiconductor, Inc, s908qc16vdse Datasheet - Page 115
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s908qc16vdse
Manufacturer Part Number
s908qc16vdse
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.S908QC16VDSE.pdf
(274 pages)
- Current page: 115 of 274
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PTD[7:0] — Port D Data Bits
11.6.2 Data Direction Register D
Data direction register D (DDRD) determines whether each port D pin is an input or an output. Writing a
1 to a DDRD bit enables the output buffer for the corresponding port D pin; a 0 disables the output buffer.
DDRD[7:0] — Data Direction Register D Bits
When DDRDx is a 1, reading address $0003 reads the PTDx data latch. When DDRDx is a 0, reading
address $0003 reads the voltage level on the pin. The data latch can always be written, regardless of the
state of its data direction bit.
Freescale Semiconductor
These read/write bits are software programmable. Data direction of each port D pin is under the control
of the corresponding bit in data direction register D. Reset has no effect on port D data.
These read/write bits control port D data direction. Reset clears DDRD[7:0], configuring all port D pins
as inputs.
1 = Corresponding port D pin configured as output
0 = Corresponding port D pin configured as input
Reset:
Read:
Write:
Avoid glitches on port D pins by writing to the port D data register before
changing data direction register D bits from 0 to 1.
port D I/O logic.
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 4
READ DDRD ($0007)
WRITE DDRD ($0007)
WRITE PTD ($0003)
READ PTD ($0003)
DDRD7
Bit 7
0
Figure 11-14. Data Direction Register D (DDRD)
DDRD6
6
0
RESET
Figure 11-15. Port D I/O Circuit
DDRD5
5
0
DDRD4
DDRDx
NOTE
PTDx
4
0
DDRD3
3
0
Figure 11-15
DDRD2
2
0
PTDPUEx
DDRD1
1
0
shows the
PULLUP
DDRD0
Bit 0
PTDx
0
Port D
115
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