s908qc16vdse Freescale Semiconductor, Inc, s908qc16vdse Datasheet - Page 199
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s908qc16vdse
Manufacturer Part Number
s908qc16vdse
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.S908QC16VDSE.pdf
(274 pages)
- Current page: 199 of 274
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PS[2:0] — Prescaler Select Bits
16.8.2 TIM1 Counter Registers
The two read-only TIM1 counter registers contain the high and low bytes of the value in the counter.
Reading the high byte (T1CNTH) latches the contents of the low byte (T1CNTL) into a buffer. Subsequent
reads of T1CNTH do not affect the latched T1CNTL value until T1CNTL is read. Reset clears the TIM1
counter registers. Setting the TIM1 reset bit (TRST) also clears the TIM1 counter registers.
Freescale Semiconductor
These read/write bits select one of the seven prescaler outputs as the input to the counter as
Table 16-1
Reset:
shows.
Reset:
Read:
Read:
If you read T1CNTH during a break interrupt, be sure to unlatch T1CNTL
by reading T1CNTL before exiting the break interrupt. Otherwise, T1CNTL
retains the value latched during the break.
Write:
Write:
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 4
Bit 15
Bit 7
Bit 7
Bit 7
0
0
Figure 16-5. TIM1 Counter High Register (T1CNTH)
PS2
Figure 16-6. TIM1 Counter Low Register (T1CNTL)
0
0
0
0
1
1
1
1
= Unimplemented
Bit 14
Bit 6
6
0
6
0
PS1
Table 16-1. Prescaler Selection
0
0
1
1
0
0
1
1
Bit 13
Bit 5
5
0
5
0
PS0
0
1
0
1
0
1
0
1
Bit 12
NOTE
Bit 4
4
0
4
0
Internal bus clock ÷ 16
Internal bus clock ÷ 32
Internal bus clock ÷ 64
Internal bus clock ÷ 1
Internal bus clock ÷ 2
Internal bus clock ÷ 4
Internal bus clock ÷ 8
TIM1 Clock Source
T1CLK (if available)
Bit 11
Bit 3
3
0
3
0
Bit 10
Bit 2
2
0
2
0
Bit 9
Bit 1
1
0
1
0
Bit 0
Bit 8
Bit 0
Bit 0
0
0
Registers
199
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