s908qc16vdse Freescale Semiconductor, Inc, s908qc16vdse Datasheet - Page 203
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s908qc16vdse
Manufacturer Part Number
s908qc16vdse
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.S908QC16VDSE.pdf
(274 pages)
- Current page: 203 of 274
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TOVx — Toggle-On-Overflow Bit
CHxMAX — Channel x Maximum Duty Cycle Bit
Freescale Semiconductor
When ELSxB and ELSxA are both clear, channel x is not connected to an I/O port, and pin T1CHx is
available as a general-purpose I/O pin.
When channel x is an output compare channel, this read/write bit controls the behavior of the channel
x output when the counter overflows. When channel x is an input capture channel, TOVx has no effect.
When the TOVx bit is at 1, setting the CHxMAX bit forces the duty cycle of buffered and unbuffered
PWM signals to 100%. As
or cleared. The output stays at the 100% duty cycle level until the cycle after CHxMAX is cleared.
1 = Channel x pin toggles on counter overflow.
0 = Channel x pin does not toggle on counter overflow.
After initially enabling a TIM1 channel register for input capture operation
and selecting the edge sensitivity, clear CHxF to ignore any erroneous
edge detection flags.
When TOVx is set, a counter overflow takes precedence over a channel x
output compare if both occur at the same time.
CHxMAX
T1CHx
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 4
OVERFLOW
Figure 16-13
COMPARE
PERIOD
OUTPUT
Figure 16-13. CHxMAX Latency
OVERFLOW
Table 16-2
shows, the CHxMAX bit takes effect in the cycle after it is set
COMPARE
OUTPUT
NOTE
NOTE
OVERFLOW
shows how ELSxB and ELSxA work.
COMPARE
OUTPUT
OVERFLOW
COMPARE
OUTPUT
OVERFLOW
Registers
203
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