s908qc16vdse Freescale Semiconductor, Inc, s908qc16vdse Datasheet - Page 216

• Manufacturer Part Number: s908qc16vdse
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Timer Interface Module (TIM2)
CHxF — Channel x Flag Bit
CHxIE — Channel x Interrupt Enable Bit
MSxB — Mode Select Bit B
MSxA — Mode Select Bit A
ELSxB and ELSxA — Edge/Level Select Bits
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When channel x is an input capture channel, this read/write bit is set when an active edge occurs on
the channel x pin. When channel x is an output compare channel, CHxF is set when the value in the
counter registers matches the value in the TIM2 channel x registers.
Clear CHxF by reading the T2SCx register with CHxF set and then writing a 0 to CHxF. If another
interrupt request occurs before the clearing sequence is complete, then writing 0 to CHxF has no
effect. Therefore, an interrupt request cannot be lost due to inadvertent clearing of CHxF.
Writing a 1 to CHxF has no effect.
This read/write bit enables TIM2 interrupt service requests on channel x.
This read/write bit selects buffered output compare/PWM operation. MSxB exists only in the T2SC0.
Setting MS0B causes the contents of T2SC1 to be ignored by the TIM2 and reverts T2CH1 to
general-purpose I/O.
When ELSxB:A ≠ 00, this read/write bit selects either input capture operation or unbuffered output
compare/PWM operation. See
When ELSxB:A = 00, this read/write bit selects the initial output level of the T2CHx pin (see
Table
When channel x is an input capture channel, these read/write bits control the active edge-sensing logic
on channel x.
When channel x is an output compare channel, ELSxB and ELSxA control the channel x output
behavior when an output compare occurs.
When ELSxB and ELSxA are both clear, channel x is not connected to an I/O port, and pin T2CHx is
available as a general-purpose I/O pin.
1 = Input capture or output compare on channel x
0 = No input capture or output compare on channel x
1 = Channel x interrupt requests enabled
0 = Channel x interrupt requests disabled
1 = Buffered output compare/PWM operation enabled
0 = Buffered output compare/PWM operation disabled
1 = Unbuffered output compare/PWM operation
0 = Input capture operation
1 = Initial output level low
0 = Initial output level high
17-2).
Before changing a channel function by writing to the MSxB or MSxA bit, set
the TSTOP and TRST bits in the TIM2 status and control register (T2SC).
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 4
Table
17-2.
Table 17-2
NOTE
shows how ELSxB and ELSxA work.
Freescale Semiconductor