s908az32ag2cfue Freescale Semiconductor, Inc, s908az32ag2cfue Datasheet - Page 127

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s908az32ag2cfue

Manufacturer Part Number
s908az32ag2cfue
Description
M68hc08 Microcontrollers 8-bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
13.3.5 Internal Reset
An internal reset clears the COP prescaler and the COP counter.
13.3.6 Reset Vector Fetch
A reset vector fetch occurs when the vector address appears on the data bus. A reset vector fetch clears
the COP prescaler.
13.3.7 COPD
The COPD signal reflects the state of the COP disable bit (COPD) in the configuration register. (See
Chapter 9 Configuration Register
13.3.8 COPRS
The COPRS signal reflects the state of the COP rate select bit. (COPRS) in the configuration register.
(See
13.4 COP Control Register
The COP control register is located at address $FFFF and overlaps the reset vector. Writing any value to
$FFFF clears the COP counter and starts a new timeout period. Reading location $FFFF returns the low
byte of the reset vector.
13.5 Interrupts
The COP does not generate CPU interrupt requests.
13.6 Monitor Mode
The COP is disabled in monitor mode when V
13.7 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power-consumption standby modes.
13.7.1 Wait Mode
The COP remains active in wait mode. To prevent a COP reset during wait mode, periodically clear the
COP counter in a CPU interrupt routine.
Freescale Semiconductor
Chapter 9 Configuration Register
Address:
Reset:
Read:
Write:
$FFFF
Bit 7
Figure 13-2. COP Control Register (COPCTL)
(CONFIG-1)).
6
MC68HC908AZ32A Data Sheet, Rev. 2
(CONFIG-1)).
5
Hi
Low Byte of Reset Vector
is present on the IRQ1 pin or on the RST pin.
Unaffected by Reset
Clear COP Counter
4
3
2
1
COP Control Register
Bit 0
127

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