s908az32ag2cfue Freescale Semiconductor, Inc, s908az32ag2cfue Datasheet - Page 82

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s908az32ag2cfue

Manufacturer Part Number
s908az32ag2cfue
Description
M68hc08 Microcontrollers 8-bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
System Integration Module (SIM)
7.5.1 Interrupts
At the beginning of an interrupt, the CPU saves the CPU register contents on the stack and sets the
interrupt mask (I bit) to prevent additional interrupts. At the end of an interrupt, the RTI instruction recovers
the CPU register contents from the stack so that normal processing can resume.
interrupt entry timing.
Interrupts are latched, and arbitration is performed in the SIM at the start of interrupt processing. The
arbitration result is a constant that the CPU uses to determine which vector to fetch. Once an interrupt is
latched by the SIM, no other interrupt can take precedence, regardless of priority, until the latched
interrupt is serviced (or the I bit is cleared), see
82
INTERRUPT
I BIT
R/W
IAB
IDB
INTERRUPT
MODULE
I BIT
MODULE
R/W
IDB
IAB
DUMMY
Figure 7-9
DUMMY
SP – 4
SP
PC – 1[7:0]
CCR
shows interrupt recovery timing.
SP – 3
SP – 1
MC68HC908AZ32A Data Sheet, Rev. 2
Figure 7-9. Interrupt Recovery
Figure 7-8
PC – 1[15:8]
A
SP – 2
SP – 2
X
Figure
.
X
SP – 1
Interrupt Entry
SP – 3
PC – 1 [7:0]
7-10.
A
SP
SP – 4
PC – 1 [15:8]
CCR
VECT H
PC
OPCODE
V DATA H
PC + 1
VECT L
OPERAND
V DATA L
Figure 7-8
START ADDR
Freescale Semiconductor
OPCODE
shows

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