s908az32ag2cfue Freescale Semiconductor, Inc, s908az32ag2cfue Datasheet - Page 280

• Manufacturer Part Number: s908az32ag2cfue
• Description: M68hc08 Microcontrollers 8-bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

MSCAN Controller (MSCAN08)
24.12.2 Identifier Registers
The identifiers consist of either 11 bits (ID10–ID0) for the standard, or 29 bits (ID28–ID0) for the extended
format. ID10/28 is the most significant bit and is transmitted first on the bus during the arbitration
procedure. The priority of an identifier is defined to be highest for the smallest binary number.
SRR — Substitute Remote Request
IDE — ID Extended
RTR — Remote Transmission Request
24.12.3 Data Length Register (DLR)
This register keeps the data length field of the CAN frame.
DLC3–DLC0 — Data Length Code Bits
280
$05b
$05b
$05b
$05b
Addr
This fixed recessive bit is used only in extended format. It must be set to 1 by the user for transmission
buffers and will be stored as received on the CAN bus for receive buffers.
This flag indicates whether the extended or standard identifier format is applied in this buffer. In case
of a receive buffer, the flag is set as being received and indicates to the CPU how to process the buffer
identifier registers. In case of a transmit buffer, the flag indicates to the MSCAN08 what type of
identifier to send.
This flag reflects the status of the remote transmission request bit in the CAN frame. In case of a
receive buffer, it indicates the status of the received frame and supports the transmission of an
answering frame in software. In case of a transmit buffer, this flag defines the setting of the RTR bit to
be sent.
The data length code contains the number of bytes (data byte count) of the respective message. At
transmission of a remote frame, the data length code is transmitted as programmed while the number
of transmitted bytes is always 0. The data byte count ranges from 0 to 8 for a data frame.
shows the effect of setting the DLC bits.
0
1
2
3
1 = Extended format, 29 bits
0 = Standard format, 11 bits
1 = Remote frame
0 = Data frame
Register
IDR0
IDR1
IDR2
IDR3
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Figure 24-12. Standard Identifier Mapping
Bit 7
ID10
ID2
MC68HC908AZ32A Data Sheet, Rev. 2
= Unimplemented
ID9
ID1
6
ID8
ID0
5
RTR
ID7
4
IDE(=0)
ID6
3
ID5
2
Freescale Semiconductor
ID4
1
Table 24-5
Bit 0
ID3