ics9248-169 ETC-unknow, ics9248-169 Datasheet
ics9248-169
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ics9248-169 Summary of contents
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... ICS reserves the right to make changes in the device data identified in this publication without further notice. ICS advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is current and accurate. ICS9248-169 48 1 VDDL ...
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... ICS9248-169 Pin Descriptions ...
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... General Description The ICS9248-169 is a single chip clock solution for Desktop designs. It provides all necessary clock signals for such a system. Spread spectrum may be enabled through I Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9248-169 ...
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... ICS9248-169 General I The information in this section assumes familiarity with I For more information, contact ICS for an I How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address D2 • ICS clock will acknowledge • Controller (host) sends a dummy command code • ...
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... ± ICS9248-169 ...
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... ICS9248-169 Byte 1: CPU, Active/Inactive Register (1= enable disable ...
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... CLK_STOP asychronous input to the clock synthesizer used to turn off the CPU clocks for low power operation. CLK_STOP# is synchronized by the ICS9248-169. The minimum that the CPU clock is enabled (CLK_STOP# high pulse) is 100 CPU clocks. All other clocks will continue to run while the CPU clocks are disabled. The CPU clocks will always be stopped in a low state and start in such a manner that guarantees the high pulse width is a full pulse ...
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... ICS9248-169 PCI_STOP# Timing Diagram PCI_STOP asynchronous input to the ICS9248-169 used to turn off the PCICLK clocks for low power operation. PCI_STOP# is synchronized by the ICS9248-169 internally. The minimum that the PCICLK clocks are enabled (PCI_STOP# high pulse least 10 PCICLK clocks. PCICLK clocks are stopped in a low state and started with a full high pulse width guaranteed ...
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... The programming resistors should be located close to the series termination resistor to minimize the current loop area more important to locate the series termination resistor close to the driver than the programming resistor. Via to VDD 2K 8.2K Clock trace to load Series Term. Res. Fig ICS9248-169 ...
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... ICS9248-169 Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0 Ambient Operating Temperature . . . . . . . . . . . . . 0°C to +70°C Case Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 115°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied ...
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... DDL L CONDITIONS ICS9248-169 MIN TYP MAX UNITS 2 2.4 V 0.17 0.4 V -58 - 1.3 1.6 ns 1 175 ps 216 250 ps MIN TYP MAX UNITS 2.4 3 ...
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... ICS9248-169 Electrical Characteristics - SDRAM 70C 3.3V +/-5 PARAMETER SYMBOL Output High Voltage V OH3 Output Low Voltage V OL3 I Output High Current OH3 I Output Low Current OL3 1 Rise Time Fall Time Duty Cycle t3 1 Skew t sk3 1 Propagation Delay Tprop ...
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... Third party brands and names are the property of their respective owners. = 2.5V +/-5 (unless otherwise stated) L CONDITIONS ICS9248-169 MIN TYP MAX UNITS 2.4 3.03 V 0.23 0.4 V -50 - 1.26 4.0 ns 1. ...
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... ICS9248-169 INDEX INDEX AREA AREA 45° 45° SEATING SEATING b PLANE PLANE .10 (.004) C .10 (.004) C 300 mil SSOP Package Ordering Information ICS9248yF-169-T Example: ICS XXXX PPP - T Designation for tape and reel packaging Pattern Number ( digit number for parts with ROM code patterns) ...