ics9248-151 ETC-unknow, ics9248-151 Datasheet

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... CPUCLK (1:0) Stop CPUCLK2 Stop AGPCLK (2: IOAPIC (2: PCICLK (7:0) Stop PCICLK_F 0 1 ICS9248-151 Pin Configuration 48 1 REF0 47 2 REF1/FS4 VDDLAPIC IOAPIC0 44 5 IOAPIC1 43 6 GND 42 7 IOAPIC2 41 8 VDDLCPU 40 9 GND 39 10 ...

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... ICS9248-151 Pin Descriptions ...

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... General Description The ICS9248-151 is a single chip clock solution for Desktop designs. It provides all necessary clock signals for such a system. Spread spectrum may be enabled through I programming. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9248- ...

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... ICS9248-151 Serial Configuration Command Bitmap Byte0: Functionality and Frequency Select Register (default = ...

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... Note: Don’t write into this register, writing into this register can cause malfunction 5 ICS9248-151 ...

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... ICS9248-151 Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0 Ambient Operating Temperature . . . . . . . . . . 0°C to +70°C Case Temperature . . . . . . . . . . . . . . . . . . . . . . 115°C Storage Temperature . . . . . . . . . . . . . . . . . . . . –65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied ...

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... ICS9248-151 MIN TYP MAX UNITS Ω 714 Ω 714 2 V 0.23 0 0. 175 ps 145 250 ps 60 150 ...

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... ICS9248-151 Electrical Characteristics - IOAPIC 70° 3.3 V +/-5 PARAMETER SYMBOL Output High Voltage V OH2B Output Low Voltage V OL2B Output High Current I OH2B Output Low Current I OL2B 1 Rise Time t r2B 1 Fall Time t f2B 1 Duty Cycle d t2B 1 Skew t sk2B Jitter, Cycle to cycle tjcyc-cyc1 V ...

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... VOH = 2.4 V, VOL = 0.4 V; 48MHz VT = 1.5 V; 48MHz VOL = 0.4 V, VOH = 2.4 V; 24MHz VOH = 2.4 V, VOL = 0.4 V; 24MHz VT = 1.5 V; 24MHz V = 1.5 V; REF 1.5 V; REF 1.5 V; REF 1.5 V; 24, 48MHz 1.5 V; 24, 48MHz 1.5 V; 24, 48MHz T 9 ICS9248-151 MIN TYP MAX UNITS Ω 2 0.26 0.4 V - 1.5 ...

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... ICS9248-151 General I The information in this section assumes familiarity with I For more information, contact ICS for an I How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address D2 • ICS clock will acknowledge • Controller (host) sends a dummy command code • ...

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... CLK_STOP asychronous input to the clock synthesizer used to turn off the CPU clocks for low power operation. CLK_STOP# is synchronized by the ICS9248-151. The minimum that the CPU clock is enabled (CLK_STOP# high pulse) is 100 CPU clocks. All other clocks will continue to run while the CPU clocks are disabled. The CPU clocks will always be stopped in a low state and start in such a manner that guarantees the high pulse width is a full pulse ...

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... ICS9248-151 PCI_STOP# Timing Diagram PCI_STOP asynchronous input to the ICS9248-151 used to turn off the PCICLK clocks for low power operation. PCI_STOP# is synchronized by the ICS9248-151 internally. The minimum that the PCICLK clocks are enabled (PCI_STOP# high pulse least 10 PCICLK clocks. PCICLK clocks are stopped in a low state and started with a full high pulse width guaranteed ...

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... The programming resistors should be located close to the series termination resistor to minimize the current loop area more important to locate the series termination resistor close to the driver than the programming resistor. Via to VDD 2K 8.2K Clock trace to load Series Term. Res. Fig ICS9248-151 ...

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... ICS9248-151 INDEX INDEX AREA AREA 45° 45° .10 (.004) C .10 (.004) C 300 mil SSOP Package Ordering Information ICS9248yF-151LF-T Example: ICS XXXX y F PPP LF- T 0353D—08/03/04 c SYMBOL α ...