ics9248-171 ETC-unknow, ics9248-171 Datasheet

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ics9248-171

Manufacturer Part Number
ics9248-171
Description
Single Chip, System Clock K7/1647 Chipset 147mhz; Sdram Clocks
Manufacturer
ETC-unknow
Datasheet
AMD - K7™ System Clock Chip
Third party brands and names are the property of their respective owners.
Recommended Application:
ALI 1647 style chipset
Output Features:
Features:
Skew Specifications:
Block Diagram
PCI_STOP#
DG_STOP#
FS (3:0)
SDATA
MODE
9248-171 Rev - 12/29/00
SCLK
1 - Differential pair open drain CPU clocks
1 - Single-ended open drain CPU clock
13 - SDRAM @ 3.3V
7 - PCI @3.3V
2 - AGP @ 3.3V
1 - 48MHz, @3.3V
1 - REF @3.3V, (selectable strength) through I
Up to 147MHz frequency support
Support power management: DG stop, PCI stop and
Power down Mode from I
Spread spectrum for EMI control (0 to -0.5% down
spread, ± 0.25% center spread).
Uses external 14.318MHz crystal
CPUT - CPUC: <250ps
PCI - PCI: <500ps
CPU - SDRAM: <350ps
SDRAM - SDRAM: <250ps
AGP - AGP: <250ps
PCI - AGP: <350ps
CPU - PCI: <3ns
PD#
X2
X1
XTAL
OSC
Spectrum
PLL2
Spread
Control
Config.
PLL1
Logic
Reg.
Integrated
Circuit
Systems, Inc.
DIVDER
DIVDER
DIVDER
DIVDER
SDRAM
CPU
AGP
PCI
2
C programming.
Stop
Stop
Stop
2
13
6
2
48MHz
CPUCLKC0
SDRAM (12:0)
PCICLK (5:0)
PCICLK_F
AGP (1:0)
CPUCLKT (1:0)
REF0
2
C
Functionality
Power Groups
AVDD = Xtal, Core PLL
AVDD48 = 48MHz, Fixed PLL
FS3
*MODE/PCICLK3
0
0
0
0
0
0
0
0
1
1
1
1
1
0
1
1
Notes:
*FS2/PCICLK_F
**FS3/48MHz
ADVANCE INFORMATION documents contain information on products
in the formative or design phase development. Characteristic data and
other specifications are design goals. ICS reserves the right to change or
discontinue these products without notice.
*DG_STOP#
**FS1/AGP0
**FS0/REF0
PCICLK0
PCICLK1
PCICLK2
PCICLK4
PCICLK5
AVDD48
FS2
REF0 could be 1X or 2X strength controlled by I
* Internal Pull-up Resistor of 120K to VDD
** Internal pull-down of 120K to GND.
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
AVDD
AGP1
SCLK
*PD#
GND
GND
GND
GND
VDD
VDD
X1
X2
240mil TSSOP package
48-Pin 300mil SSOP &
FS1
Pin Configuration
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
FS0
Advance Information
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
100.00
100.00
100.00
120.00
133.33
133.33
101.00
100.00
100.00
100.00
126.00
133.33
133.33
66.66
66.66
90.00
CPU
ICS9248-171
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
SDRAM
100.00
100.00
133.33
120.00
100.00
133.33
101.00
100.00
133.33
126.00
100.00
133.33
66.66
66.66
90.00
66.66
GND
CPUCLKT0
CPUCLKC0
CPUCLKT1
SDATA
SDRAM0
SDRAM1
GND
VDD
SDRAM2
SDRAM3
SDRAM4
SDRAM5
VDD
GND
SDRAM6
SDRAM7
SDRAM8
SDRAM9
GND
VDD
SDRAM10(PCI_STOP#)*
SDRAM11
SDRAM12
2
C.

Related parts for ics9248-171

ics9248-171 Summary of contents

Page 1

... AVDD = Xtal, Core PLL AVDD48 = 48MHz, Fixed PLL ADVANCE INFORMATION documents contain information on products in the formative or design phase development. Characteristic data and other specifications are design goals. ICS reserves the right to change or discontinue these products without notice. ICS9248-171 Advance Information 48 1 GND 47 ...

Page 2

... ICS9248-171 Advance Information Pin Descriptions PIN NUMBER PIN NAME 1 1 DG_STOP PD 11, 16, 23, 29, GND 34, 41 17, 28, 35, 40 VDD 6 AVDD 2, 3 FS0 7 REF0 2, 3 FS1 9 AGP0 10 AGP1 PCICLK_F FS2 PCICLK 20, 19, 15, 14, 13 (5:4) (2:0) PCICLK3 ODE ...

Page 3

... General Description The ICS9248-171 is a main clock synthesizer chip for AMD-K7 based systems with ALI 1647 style chipset. This provides all clocks required for such a system. Spread spectrum may be enabled through I This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9248-171 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations ...

Page 4

... ICS9248-171 Advance Information Serial Configuration Command Bitmap Byte0: Functionality and Frequency Select Register (default = ...

Page 5

... Note: Don’t write into this register, writing into this register can cause malfunction 5 ICS9248-171 Advance Information ...

Page 6

... ICS9248-171 Advance Information Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0 Ambient Operating Temperature . . . . . . . . . . . . . 0°C to +70°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied ...

Page 7

... Note 2 Note 2 Note required for switching, where /2-150mV; Max=(Vpullup (external) 7 ICS9248-171 Advance Information MIN TYP MAX 1 1.2 0.4 18 0.9 0.9 V pullup(external) 0.4 + 0.6 V pullup(external) 0.2 + 0.6 550 1100 45 55 250 250 -250 +250 is the "true" ...

Page 8

... ICS9248-171 Advance Information Electrical Characteristics - PCICLK 70º 3.3 V +/-5 PARAMETER SYMBOL Output High Voltage V OH1 Output Low Voltage V OL1 Output High Current I OH1 Output Low Current I OL1 1 Rise Time Fall Time Duty Cycle Skew Guaranteed by design, not 100% tested in production ...

Page 9

... (unless otherwise stated) CONDITIONS 50% 9 ICS9248-171 Advance Information MIN TYP MAX UNITS 2.4 V 0 MIN TYP MAX UNITS 2 V 0.4 ...

Page 10

... ICS9248-171 Advance Information General I The information in this section assumes familiarity with I For more information, contact ICS for an I How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address D2 • ICS clock will acknowledge • Controller (host) sends a dummy command code • ...

Page 11

... The programming resistors should be located close to the series termination resistor to minimize the current loop area more important to locate the series termination resistor close to the driver than the programming resistor. Via to VDD 2K 8.2K Clock trace to load Series Term. Res. Fig ICS9248-171 Advance Information ...

Page 12

... Advance Information PCI_STOP# Timing Diagram PCI_STOP asynchronous input to the ICS9248-171 used to turn off the PCICLK clocks for low power operation. PCI_STOP# is synchronized by the ICS9248-171 internally. The minimum that the PCICLK clocks are enabled (PCI_STOP# high pulse least 10 PCICLK clocks. PCICLK clocks are stopped in a low state and started with a full high pulse width guaranteed ...

Page 13

... Crystal Notes: 1. All timing is referenced to the Internal CPUCLK (defined as inside the ICS9248-171 device shown, the outputs Stop Low on the next falling edge after PD# goes low asynchronous input and metastable conditions may exist. This signal is synchronized inside this part. ...

Page 14

... ICS9248-171 Advance Information Ordering Information ICS9248yF-171-T Example: ICS XXXX PPP - T Designation for tape and reel packaging Pattern Number ( digit number for parts with ROM code patterns) Package Type Revision Designator (will not correlate with datasheet revision) Device Type (consists digit numbers) Prefix Third party brands and names are the property of their respective owners ...

Page 15

... ICS Standard Device ADVANCE INFORMATION documents contain information on products in the formative or design phase development. Characteristic data and 15 other specifications are design goals. ICS reserves the right to change or discontinue these products without notice. ICS9248-171 Advance Information In Millimeters In Inches COMMON DIMENSIONS COMMON DIMENSIONS ...

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