ics9248-151 ETC-unknow, ics9248-151 Datasheet - Page 12

• Manufacturer Part Number: ics9248-151
• Description: Single Chip Clock Apollo With 200mhz Frequency Support
• Manufacturer: ETC-unknow

Notes:
1. All timing is referenced to the Internal CPUCLK (defined as inside the ICS9248-151 device.)
2. PCI_STOP# is an asynchronous input, and metastable conditions may exist. This signal is required to be synchronized
3. All other clocks continue to run undisturbed.
4. CPU_STOP# is shown in a high (true) state.
0353D—08/03/04
PCI_STOP# Timing Diagram
PCI_STOP# is an asynchronous input to the ICS9248-151. It is used to turn off the PCICLK clocks for low power
operation. PCI_STOP# is synchronized by the ICS9248-151 internally. The minimum that the PCICLK clocks are
enabled (PCI_STOP# high pulse) is at least 10 PCICLK clocks. PCICLK clocks are stopped in a low state and started
with a full high pulse width guaranteed. PCICLK clock on latency cycles are only one rising PCICLK clock off latency
is one PCICLK clock.
ICS9248-151
inside the ICS9248-151.
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