ics9248-110 ETC-unknow, ics9248-110 Datasheet - Page 8

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ics9248-110

Manufacturer Part Number
ics9248-110
Description
750/760; System Clock Chip 150mhz
Manufacturer
ETC-unknow
Datasheet
I
Byte 6: SDRAM Clock & Generator Mode Control Register
Notes:
1. Default at power-up will be latched logic inputs to define frequency, as displayed by Bit 1.
2. PWD = Power-Up Default
Third party brands and names are the property of their respective owners.
ICS9248-110
2
C Command Bitmaps
3,2, 6:4
Bit
7
1
0
0 - Frequency is selected by hardware select, latched input; Spread controlled by pin 29
1 - Frequency is selected by Bit 6:2; Spread controlled by bit 7
0 - SDRAM _OUT Disable
1 - SDRAM _OUT Enable
Bit 3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Bit 2
Spread Spectrum enable (+/- 0.25% center spread) 1=ON 0=OFF
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Bit 6
FS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Bit 5
FS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Description
8
Bit 4
FS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
SDRAM
100.99
133.33
100.7
CPU,
115
103
105
110
102
104
106
107
108
109
110
111
112
113
114
116
117
118
119
120
121
122
123
124
125
140
150
90
95
30.00
31.67
33.66
38.33
33.57
34.33
35.00
36.67
34.00
34.67
35.33
35.67
36.00
36.33
36.67
37.00
37.33
37.67
38.00
38.67
39.00
39.33
39.67
30.00
30.25
30.50
30.75
31.00
31.25
33.33
35.00
37.50
PCI
60.00
63.33
67.33
76.67
67.13
68.67
70.00
73.33
68.00
69.33
70.67
71.33
72.00
72.67
73.33
74.00
74.67
75.33
76.00
77.33
78.00
78.67
79.33
60.00
60.50
61.00
61.50
62.00
62.50
66.67
70.00
75.00
AGP
Reserved
Note1
PWD
0
0
1

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