mc68hc908jw32 Freescale Semiconductor, Inc, mc68hc908jw32 Datasheet - Page 114

• Manufacturer Part Number: mc68hc908jw32
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Timer Interface Module (TIM)
TRST — TIM Reset Bit
PS[2:0] — Prescaler Select Bits
8.9.2 TIM Counter Registers
The two read-only TIM counter registers contain the high and low bytes of the value in the TIM counter.
Reading the high byte (TCNTH) latches the contents of the low byte (TCNTL) into a buffer. Subsequent
reads of TCNTH do not affect the latched TCNTL value until TCNTL is read. Reset clears the TIM counter
registers. Setting the TIM reset bit (TRST) also clears the TIM counter registers.
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Setting this write-only bit resets the TIM counter and the TIM prescaler. Setting TRST has no effect on
any other registers. Counting resumes from $0000. TRST is cleared automatically after the TIM
counter is reset and always reads as logic 0. Reset clears the TRST bit.
These read/write bits select one of the seven prescaler outputs as the input to the TIM counter as
Table 8-2
1 = Prescaler and TIM counter cleared
0 = No effect
shows. Reset clears the PS[2:0] bits.
Address: $000C
Setting the TSTOP and TRST bits simultaneously stops the TIM counter at
a value of $0000.
If you read TCNTH during a break interrupt, be sure to unlatch TCNTL by
reading TCNTL before exiting the break interrupt. Otherwise, TCNTL
retains the value latched during the break.
Reset:
Read:
Write:
PS2
0
0
0
0
1
1
1
1
Bit 15
Bit 7
0
Figure 8-5. TIM Counter Registers High (TCNTH)
PS1
0
0
1
1
0
0
1
1
= Unimplemented
14
6
0
MC68HC908JW32 Data Sheet, Rev. 5
Table 8-2. Prescaler Selection
PS0
0
1
0
1
0
1
0
1
13
0
5
NOTE
NOTE
12
4
0
Internal bus clock ÷ 1
Internal bus clock ÷ 2
Internal bus clock ÷ 4
Internal bus clock ÷ 8
Internal bus clock ÷ 16
Internal bus clock ÷ 32
Internal bus clock ÷ 64
11
3
0
TIM Clock Source
TCLK1
10
2
0
1
9
0
Freescale Semiconductor
Bit 0
Bit 8
0